Industrial Technology Research Institute

Chao-Tang Lee

Cheng-Chun Tu

Tzi-Cker Chiueh

Peng-Kai Hsu

Tai-Hua Hsiao

Shu-Hao Hsu

A method for live migration of a virtual machine in a MR-IOV environment is provided. The method is used in a system, wherein the system includes a plurality of computing hosts, an MR-IOV device, and a management host including a physical function and configured to implement a plurality of virtual functions. Eand each computing host and the management host are coupled to the MR-IOV device. The method includes: migrating, by a source computing host of the computing hosts, a source virtual machine in the source computing host to a destination VM in a destination computing host of the computing hosts, wherein the source VM includes a source VF; transmitting, by the destination computing host, a request message to a management host and reassigning, by the management host, a first VF corresponding to the source VF in the management host to the destination VM according to the request message.

Method and device for live migration of virtual machine in a multi-root I/O virtualization environment and computing host thereof

A ring network system using peripheral component interconnect express (PCIe) is disclosed. The ring network system includes N PCIe bridges. Each of the N PCIe bridges is connected to an individual server and includes a first port and a second port. The second port of an ith PCIe bridge of the N PCIe bridges is connected to the first port of an ((i mod N)+1)th PCIe bridge of the N PCIe bridges. Each of the N PCIe bridges includes an address mapping chip. The address mapping chip of each of the N PCIe bridges configurably maps to a system address of each of at least portion of N servers connected by the N PCIe bridges and configurably maps to an address of each of at least portion of the N PCIe bridges for setting up a mapping relationship between the N PCIe bridges.

Ring network system using peripheral component interconnect express and setting method thereof

An interrupt handling method and a system are provided. An exemplary embodiment of an interrupt handling method in a virtualized environment operable on a computer having one or more CPU cores, includes disabling a virtual machine exit triggers by an interrupt that destined to a virtual machine (VM), via a hypervisor of the virtualized environment. The exemplary method further includes delivering directly one or more interrupts from an I/O virtualization (IOV) device and a virtual device that destined to the VM, while the destined VM is running on one of the one or more CPU cores, otherwise delivering the one or more interrupts to the hypervisor to deliver corresponding one or more virtual interrupts to the destined VM.

Method and system for handling interrupts in a virtualized environment

A Peripheral Component Interconnect Express (PCIe) network system with fail-over capability and an operation method thereof are provided. The PCIe network system includes a management host, a PCIe switch, a first non-transparent bridge, and a second non-transparent bridge. The upstream port of the PCIe switch is electrically coupled to the management host. The first non-transparent bridge is disposed in the PCIe switch for electrically coupling to the first PCIe port of a calculation host. The first non-transparent bridge can couple the first PCIe port of the calculation host to the management host. The second non-transparent bridge is disposed in the PCIe switch for electrically coupling to the second PCIe port of the calculation host. The second non-transparent bridge can couple the second PCIe port of the calculation host to the management host.

PCIe network system with fail-over capability and operation method thereof

A memory mapping method for coupling a plurality of servers with a PCI express bus is disclosed. The method comprises: configuring an extended memory address on a management host having a memory address; mapping the extended memory address of the management host corresponding to each of the servers to memory addresses of each of the servers respectively by a plurality of non-transparent bridges of the PCI express bus; configuring an extended memory address on each of the servers; and mapping the extended memory address of each of the servers to the memory address and the extended memory address of the management host by the non-transparent bridges, the extended memory address of each of the servers corresponding to the servers and the management host.

Memory mapping method and memory mapping system

In a method for SR-IOV Virtual Functions Sharing on Multi-Hosts, implemented in a management system, one or more fake devices are simulated in one or more hosts with each fake device corresponding to one of a plurality of SR-IOV virtual functions. Each of one or more configuration spaces is redirected from each SR-IOV virtual function to each fake device, respectively. Each of configuration space requests is redirected from a corresponding fake device to a corresponding SR-IOV virtual function when the configuration space request is received. And each of memory access operations is redirected from the corresponding SR-IOV virtual function to a mapped memory on a corresponding host with the corresponding fake device, and each of interrupts generated by one or more SR-IOV virtual machines is redirected to the corresponding fake device.

Growing community of inventors

Pingtung County, Taiwan

Chao-Tang Lee