Applied Materials, Inc.

Chao-Sheng Chou

Kuan-Ting Lin

Tzy-Tzan Fu

A method of fabricating a semiconductor device having a gate structure comprising SiO and Si N that exhibits reduced hydrogen diffusion during low temperature chemical vapor deposition of silicon nitride. In the method, a silicon dioxide (SiO ) layer is deposited on a wafer after a gate structure is fabricated. A barrier layer is formed on the silicon dioxide (SiO ) layer. Then a silicon nitride layer is formed over it by low temperature chemical vapor deposition. The barrier layer reduces, and may even altogether prevent, diffusion of the hydrogen absorbed by the silicon nitride layer into the gate oxide and channel during the low temperature chemical vapor deposition of silicon nitride.

Growing community of inventors

Hsinchu, Taiwan

Chao-Sheng Chou