Ordos Yuansheng Optoelectronics Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Chao Liang

Jingyi Xu

Peirong Huo

Peng Liu

Jiantao Liu

Zhenhong Xiao

Bo Li

Hong Liu

Biqi Li

Jianyun Xie

Hui Yuan

Yongqiang Zhang

Guodong Wang

Aiyu Ding

Wei Yan

Shuai Han

Bo Zhao

Changcheng Liu

Bo Huang

Yusheng Liu

Zhiming Li

The present disclosure provides a gate driving circuit and a display panel. The display panel includes a display area and a peripheral area surrounding the display area. At least one gate driving circuit is arranged in the peripheral area. The at least one gate driving circuit includes a plurality of shift register units cascaded in sequence. The plurality of shift register units include first shift register units and second shift register units. The first shift register units and the second shift register units are spaced apart from each other. The number of transistors in the first shift register units is smaller than the number of transistors in the second shift register units.

Gate driving circuit and display device

The present disclosure relates to a signal selector and a driving method therefor, a display panel, and a display device. The signal selector loads a writing signal into a control end of a switching circuit during a data writing time period, and the switching circuit is connected in response to the writing signal loaded on the control end of the switching circuit, so that the writing signal is loaded to a far end of an output signal line. During a pull up period after the data writing period, a boost control signal is loaded to the control end of a boost circuit, and the boost circuit pulls up the voltage of an output end of the switching circuit in response to the boost control signal loaded on a second end of the boost circuit.

Signal selector and driving method therefor, display panel, and display apparatus

An includes a display area and a non-display area that at least partially surrounds the display area; the non-display area includes at least two clock signal lines, wherein a ratio of a spacing between two adjacent clock signal lines to a line width of the clock signal lines is greater than or equal to 3.

Array substrate and display device

A display substrate is provided, including a display substrate that includes a display area and a bezel area; a plurality of scanning signal lines; a gate driver circuit in the bezel area; a plurality of load compensation units in the bezel area, where the load compensation units are between the gate driver circuit and a plurality of pixel units; and a plurality of scanning signal lead wires in the bezel area. At least one load compensation unit includes a compensation capacitor including a first compensation capacitor electrode in a first conductive layer and a second compensation capacitor electrode in a semiconductor layer, and an orthographic projection of the first compensation capacitor electrode on the base substrate at least partially overlaps with an orthographic projection of the second compensation capacitor electrode on the base substrate. The first compensation capacitor electrode is electrically connected to a scanning signal lead wire.

Display substrate and display apparatus

Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.

Touch display substrate and driving method therefor, and display device

The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.

Array substrate and display panel

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Beijing, China

Chao Liang