Integrated Memory Logic, Inc.

Other

Chao-I Chang

Cheng-Chi Fang

Ka Kit Ling

Ji Yun Zhang

A flash memory controller with a volatile program and data memory is disclosed. The controller loads microcode and data into the program and data memory from a flash memory array upon powerup of the controller. If an error occurs during the download or the microcode does not exist in the flash memory array, then the controller loads microcode and data into the program and data memory from the host computer. In some embodiments of the invention, an initial code is downloaded to the controller so that an evaluation of the configuration of the controller and the flash memory can be communicated to a host computer. The host computer then downloads for storage into the flash memory a tailored microcode and restarts the controller so that the tailored microcode is loaded from the flash memory and executed. In some embodiments, a protection circuit is provided to protect the microcode from accidentally being erased from the flash memory. Additionally, in some embodiments, an interleaved data structure is utilized to minimize wait times during read and write operations to the flash memory.

Flash memory controller with updateable microcode

A device controller having an autodisk controller is presented. The autodisk controller in monitor mode is capable of monitoring the address of incoming data blocks and, when a target address is reached, triggers a switch of the device controller to buffer mode. In buffer mode, the autodisk controller is capable of monitoring parameters regarding incoming data blocks and reporting status or errors to a microprocessor. The autodisk controller can, for example, check for Id errors, EDC errors, copyright errors, addressing errors, or data area errors. The autodisk controller can also monitor the memory buffer and determine when it is full. The autodisk controller, therefore, relieves the microprocessor of the duties of monitoring incoming data blocks and error checking those data blocks.

Autodisk controller

A device controller for interfacing a host computer with an external storage device has an autohost controller. The device controller, at the end of a read operation, fills a memory buffer with data blocks contiguous with the read operation. On a subsequent read operation, the autohost controller checks the subsequent read operation and, if the requested data is within the memory buffer, directs the device controller to transfer the data from the memory buffer without intervention from an external microprocessor. If the autohost controller does not intervene, the device controller operates under the control of the microprocessor, as normal.

Autohost controller

An embodiment of an automated cache manager includes a word/block converter, which generates a word count from a valid cache block register, a current block register, and a total block transfer register. For example, the word/block converter obtains the number of valid cache blocks and calculates a partial transfer length based on the number of valid cache blocks, the total block transfer length, and the maximum partial transfer length. The automated cache manager then initiates a partial transfer with the calculated partial transfer length.

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San Jose, CA, United States of America

Chao-I Chang