Mediatek Corporation

Chao-Ching Hung

Yu-Li Hsueh

Po-Chun Huang

Chih-Ming Hung

Chien-Wei Chen

Tzu-Chin Lin

Jui-Lin Hsu

Bao-Chi Peng

Chih-Hsien Shen

Jing-Hong Conan Zhan

Pang-Ning Chen

Wei-Hsiu Hsu

Yi-Chien Tsai

Kai-Ren Fong

Richard Y Su

Kairen Fong

A frequency calibration (FCAL) circuit and a method for calibrating an oscillation frequency of a controllable oscillator are provided. The FCAL circuit includes the controllable oscillator, a divider, a time-to-digital converter (TDC) and a calibration logic. The controllable oscillator generates a controllable oscillation clock according to a calibration code. The divider divides the oscillation frequency of the controllable oscillation clock by a predetermined divisor to generate a divided clock. The TDC converts a first period between first edges of a reference clock and the divided clock into a first period code and converts a second period between second edges of the reference clock and the divided clock into a second period code. The calibration logic compares the first period code and the second period code to generate a comparison result for determining whether the first period is greater or less than the second period, and accordingly controls the calibration code.

Frequency calibration circuit and method for calibrating oscillation frequency of controllable oscillator

A crystal oscillator (XO) and a method for performing startup of the XO are provided. The XO includes a XO core circuit, an auxiliary oscillator and a frequency detection circuit, wherein the frequency detection circuit includes a resistive circuit. The frequency detection circuit generates a detection voltage according to a driving signal associated with an auxiliary signal generated by the auxiliary oscillator and a first impedance of the resistive circuit. During a first powered on phase, the auxiliary oscillator is calibrated by utilizing the XO core circuit as a reference after startup of the XO core circuit is completed, and the resistive circuit is calibrated according to the detection voltage. During a second powered on phase, a frequency of the driving signal is calibrated according to the detection voltage, and the driving signal is injected to the XO core circuit for accelerating the startup of the XO core circuit.

Crystal oscillator and method for performing startup of crystal oscillator

A frequency-locked loop (FLL) and a method for correcting an oscillation frequency of an output signal of the FLL are provided. The FLL includes a switched capacitor circuit, a first resistor set, a second resistor set, a determination circuit and a control circuit. The switched capacitor circuit includes a capacitor, and connection of the capacitor is switched according to the oscillation frequency. The first resistor set is configured to provide a first resistance, and the second resistor set is configured to provide a second resistance. The determination circuit is configured to generate a determination result according to the first resistance and the second resistance. The control circuit is configured to generate a control signal for correcting the first resistance and the second resistance according to the determination result, where the oscillation frequency is determined based on the capacitor and at least one of the first resistance and the second resistance.

Frequency-locked loop and method for correcting oscillation frequency of output signal of frequency-locked loop

A system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock, and includes an active oscillator that generates the reference clock. The active oscillator includes at least one active component. The RX circuit generates a processed RX signal by processing an RX input signal according to the LO signal. The calibration circuit checks a signal characteristic of the processed RX signal by detecting if a calibration tone exists within a receiver bandwidth, set a frequency calibration control output in response to the calibration tone being not found in the receiver bandwidth, and output the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Apparatus and method for applying frequency calibration to local oscillator signal derived from reference clock output of active oscillator

A wireless system includes an active oscillator and a front-end circuit. The active oscillator is used to generate and output a reference clock. The active oscillator includes at least one active component, and does not include an electromechanical resonator. The front-end circuit is used to process a transmit (TX) signal or a receive (RX) signal according to a local oscillator (LO) signal. The LO signal is derived from the reference clock.

Wireless system having local oscillator signal derived from reference clock output of active oscillator that has no electromechanical resonator

A wireless system includes a local oscillator (LO) signal generation circuit, a receiver (RX) circuit, and a calibration circuit. The LO signal generation circuit generates an LO signal according to a reference clock. The LO signal generation circuit includes an active oscillator. The active oscillator generates the reference clock, wherein the active oscillator includes at least one active component, and does not include an electromechanical resonator. The RX circuit generates a down-converted RX signal by performing down-conversion upon an RX input signal according to the LO signal. The calibration circuit generates a frequency calibration control output according to a signal characteristic of the down-converted RX signal, and outputs the frequency calibration control output to the LO signal generation circuit. The LO signal generation circuit adjusts an LO frequency of the LO signal in response to the frequency calibration control output.

Apparatus and method for applying frequency calibration to local oscillator signal derived from reference clock output of active oscillator that has no electromechanical resonator

A fast-locking phase-locked loop (PLL) and an associated fast-locking method thereof are provided. The fast-locking PLL may include a gear-shifting loop filter, which is configured to have a dynamic bandwidth. The gear-shifting loop filter may include a resistor set and a capacitor set coupled to the resistor set, where the resistor set is configured to have a dynamic resistance, and the capacitor set is configured to have a dynamic capacitance. More particularly, the dynamic resistance is switched from a first resistance to a second resistance and the dynamic capacitance is switched from a first capacitance to a second capacitance, to make the dynamic bandwidth be switched from a first bandwidth to a second bandwidth.

Fast-locking phase-locked loop and associated fast-locking method thereof

A charge pump circuit includes first and second capacitors, first and second controllable current generating circuits, and an interconnection circuit. A first terminal of the first controllable current generating circuit is coupled to a first plate of the first capacitor. A first terminal of the second controllable current generating circuit is coupled to a first plate of the second capacitor. During a first operation mode, the first controllable current generating circuit refers to a first control input for selectively providing a first current, and the second controllable current generating circuit refers to a second control input for selectively providing a second current. During a second operation mode, the interconnection circuit couples the first plate of the second capacitor to a first power rail, and couples both of the second plate of the second capacitor and the first plate of the first capacitor to an output terminal.

Charge pump circuit with capacitor swapping technique and associated method

The present invention provides a charge pump including a pull-up circuit for selectively providing charges to an output terminal of the charge pump, and the pull-up circuit comprises a transistor, a capacitor and a switched-capacitor circuit, wherein the capacitor is coupled to an electrode of the transistor, and the switched-capacitor circuit is coupled between a supply voltage and another electrode of the transistor. The switched-capacitor circuit is configured to boost a voltage of the other electrode of the transistor to charge the capacitor via the transistor, then the capacitor and the output terminal of the charge pump are under a charge distribution operation.

Charge pump having level-shifting mechanism

A quadrature clock generating apparatus connected to a local oscillator generating an input clock signal and an inverted input clock signal includes a fractional dividing circuit and a quadrature signal generating circuit. The fractional dividing circuit is configured for receiving the input clock signal and the inverted input clock signal, and for performing frequency-division upon the input clock signal and the inverted input clock signal to generate a frequency-divided clock signal according to a fractional dividing parameter. The quadrature signal generating circuit is configured for receiving the input clock signal, the inverted input clock signal, and the frequency-divided clock signal to generate a plurality of quadrature clock signals.

Quadrature clock generating mechanism of communication system transmitter

A voltage-controlled oscillator for generating oscillation signals at two output terminals includes an inductor coupled between the two output terminals, a capacitor coupled between the two output terminals, two P-type transistors, coupled between a supply voltage and the two output terminals, two N-type transistors coupled between a ground voltage and the two output terminals, and a control circuit. The control circuit is coupled to the inductor, and is arranged to control a current flowing through the two P-type transistors and the inductor by controlling a voltage of the inductor.

Voltage controlled oscillator and control method thereof

A compensation apparatus including a primary circuit and a compensation circuit is provided. The primary circuit provides a first voltage, a second voltage, and a first current flowing through a first inductor. The primary circuit includes the first inductor and a function circuit generating an input signal. The first inductor is coupled between a first terminal with the first voltage and a second terminal with the second voltage. The compensation circuit includes a second inductor and a current source circuit. The second inductor is coupled between a third terminal with a third voltage and a fourth terminal with a fourth voltage. The current source circuit outputs a second current flowing through the second inductor. The current source circuit adjusts a frequency of the input signal. The primary circuit and the compensation circuit are coupled via the first inductor and the second inductor.

Compensation apparatus and inductor-based apparatus

A frequency synthesizing module includes an operating circuit, for generating a control voltage according to a reference signal and a feedback signal; a controllable oscillating circuit, configured for generating an oscillating signal according to the control voltage and a first control signal, comprising a first oscillating circuit with a first frequency gain, and a second oscillating circuit with a second frequency gain; a feedback circuit, for generating the feedback signal according to the oscillating signal and a second control signal; a control circuit, for generating the first control signal and the second control signal; wherein the control circuit adjusts the first control signal by a first value and adjusts the second control signal by a second value to estimate the first frequency gain of the first oscillating circuit; wherein the first value is proportional to the second value.

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Hsinchu, Taiwan

Chao-Ching Hung