Industrial Technology Research Institute

Chao-Chi Peng

Chun-Hui Tsai

Chi-Hua Wang

Lyuji Ozawa

Tzung-Zu Yang

Wen-Chun Wang

De-An Chang

Jyh-Haur Tyan

A problem associated with field emission displays is that of `smearing` where an otherwise sharp image appears to be surrounded by a diffuse halo of light. Our investigations have suggested that this is due to spurious reflections from the surface of the gate electrode layer. To eliminate these we have deposited an anti-reflection coating on the top surface of the gate electrode layer. This prevents the reflection of light rays travelling away from the phosphor layer towards the cathode. Such rays, if their reflection were allowed, would emerge at a different spot in the display from what was intended, resulting in a false image. A method for manufacturing a field emission display based on this approach is also described.

Reduction of smearing in cold cathode displays

A display element selection timing method applied in conjunction with an array of Field Emission Devices employs circuitry to select the elements of the array of Field Emission Devices such that the power dissipation in the array of Field Emission Devices and its attendant circuitry is minimized and the brightness is not degraded significantly.

Low power consumption driving method for field emitter displays

A process for forming self-aligned focus electrodes in an FED display is described. The process begins by forming cathode columns and gate lines in the normal way, care being taken to ensure that at the intersections between these two sets of lines (where the emitter cavities will reside) the material comprising the cathode columns is transparent to light that will expose photoresist. To this end, ITO is used with an overlay of amorphous silicon in areas well away from the intersections. With cathode and gate lines in place, a second dielectric layer is deposited and material for the focus electrodes is laid down, said material also being transparent as well as conductive, a preferred choice being ITO. Photoresist is then laid down over the upper ITO layer but, in a departure from normal practice, it is exposed to light coming from the bottom of the substrate. Thus, the gate lines act as shadow masks for exposing the photoresist on the top ITO layer, resulting in perfect alignment of the focus lines with the gate lines, cathode columns, and emitter cavities (after etching). The final step is the formation of the microtips inside the emitter cavities in the usual way.

Method to manufacture field emission array with self-aligned focus

The design of a large area display made up of a plurality of field emission display modules is described. The modules have been modified in several ways relative to prior art designs. The cathode and gate lines near the module's edge have been substantially shortened. This feature, in combination with the use of a rabbet joint for attaching thinner than usual edge plates, allows the modules to be butted up against each other such that pixels in adjoining modules are no further apart than pixels in the same module. Because of the thinner edge plates and the general compatibilty of the process, the use of internal supports between the front and rear plates becomes mandatory. Vacuum piping for the modules is located near an edge in dark space or under a green pixel, with the gettering layer being formed inside the piping. The modules all plug into a printed circuit board which includes a custom chip for driving the display.

Mosaic field emission display with internal auxiliary pads

Two embodiments of a method for metallizing a phosphor layer are presented. The key to the method is covering the phosphor with a temporary planarizing layer onto which the metallizing layer (typically aluminum) is then deposited. Once the metal layer is in place, the planarizing layer is removed (by a burning process), the metal then making good contact with the phosphor and the substrate. In the first embodiment, the dry film is located below the phosphor layer while in the second embodiment it is located above it.

Method for metallizing a phosphor layer

A hybrid tubeless process has been developed for creating a high vacuum spool-shaped glass frits plug to be used for low cost, high throughput manufacturing of flat panel display devices. This is accomplished by using a 3-port exhaust tube which allows high vacuum sealing of the FED with minimum contamination hence protects the device from early failure.

Hybrid tubeless sealing process for flat panel displays

The object of the present invention is to provide a cold cathode field emission display whose resolution is not limited by the provision of individual ballast resistors for each pixel or by the wiring system used to deliver voltage to the cold cathodes. This has been achieved by providing additional layers beneath the cold cathodes arrays so that said resistors and voltage delivery systems are located directly below the cold cathode arrays instead of alongside of them. Six different embodiments of the invention are described.

High resolution cold cathode field emission display

A structure is described in which subpixel-sized electron beams are formed by extraction from field emission microtips located on cathode columns over which orthogonally disposed gate lines have been laid. After accelerating past openings in said gate lines, all electrons originating from the same subpixel are made to pass through a single micromesh whose electric potential is more negative than that of the gate. This results in said electrons becoming collimated and forming a parallel beam which diverges only slightly before it reaches the phosphor screen (anode). A process for manufacturing this structure is also described. Said process does not require that the microtips and the micromesh be carefully aligned nor does the presence of the micromesh lead to any reduction in optical resolution. The problem of minimizing stress in the micromesh is also addressed.

Field emission device with micromesh collimator

A method of evacuating and sealing a cathode ray tube, CRT, using softened glass frit to seal the exhaust hole through which the CRT is evacuated. A three way branch tube allows a shaft driven by a linear motion means to cover the exhaust hole with a sealing plug or plate and softened vitreous glass frit while the CRT is being evacuated. In one embodiment a getter is also used. Since the CRT is being evacuated when the vitreous glass frit is softened any gases evolved from the softened glass frit are removed by the vacuum pump and are not a problem to the sealed CRT.

Vacuum seal method for cathode ray tubes

High resolution cold cathode field emission display method

A field emission display having an ion pump, for removal of outgassed material, is described. The display has a baseplate and an opposing face plate. A substrate acts as a base for the baseplate. There are parallel, spaced conductors acting as cathode electrodes, over the substrate. An insulating layer covers the cathode electrodes and the substrate, and parallel, spaced conductors act as gate electrodes and overlay the insulating layer. There is a plurality of openings extending through the insulating layer and the gate electrodes. At each of the openings is a field emission microtip connected to and extending up from one of the cathode electrodes. The faceplate has a glass base and is mounted opposite and parallel to the baseplate. A conducting anode electrode covers the glass base. There is a pattern of phosphorescent material over the conducting anode electrode, so that when electrons which are emitted from the field emission microtips strike the pattern of phosphorescent material, light is emitted, as well as outgassed material. Ion pump cathode electrodes formed of a gettering material cover the gate electrodes, so that during display operation the outgassed material is collected at the ion pump cathode electrodes. Alternately, the ion pump cathode may be formed on a focusing electrode, on a focusing mesh, or on other electrode structures.

Growing community of inventors

Chinchu, Taiwan

Chao-Chi Peng