Shandong Jianzhu University

Shandong University

Changwei Qin

Xiaoyan Li

Zhiyuan Chu

Chenghui Zhang

Lei Yang

Xiangyang Xing

Shunquan Hu

Yanfeng Li

Hongliang Zhang

Ying Jiang

Han Xu

Chengdong Li

Alian Chen

Hongchao Bai

Dongjiang Yang

Chuanjing Hou

The present invention provides a method for cooperatively suppressing a common-mode voltage and current harmonics of coupled three-level inverters, comprising: based on amplitude and phase angle of reference voltage vector, determining sector and region in which the reference voltage vector is located; selecting four basic voltage vectors with low common-mode voltage amplitudes to synthesize the reference voltage vector; writing volt-second balance equation based on selected basic voltage vectors, and calculating duty cycles thereof; and based on sector and region in which reference voltage vector is located, set value of voltage difference across capacitors on direct current side, and actual value of voltage difference across capacitors on direct current side, (1) updating duty cycles of basic voltage vectors, to realize separate control of capacitor voltage; and (2) designing and converting switching sequence into PWM drive signal of power switch, to control the coupled three-level inverter to operate.

Method and system for cooperatively suppressing common-mode voltage and current harmonics of coupled three-level inverter

A common-mode voltage suppression method includes: selecting two large and two small vectors with low common-mode voltage magnitudes as basic voltage vectors; writing a volt-second balance equation according to a selected basic voltage vectors, and calculating, an introduced distribution factor of duty cycles of small vectors, initial values of distribution factors of a duty cycle of each basic voltage vector and of small vectors; designing a neutral-point voltage balance controller to obtain and utilize a corrected value of the distribution factor of the duty cycles of the small vectors and the initial values and combine with a set neutral-point voltage balance control threshold to update the duty cycle of each basic voltage vector; and inserting shoot-through states into the small vectors, designing a switching sequence, converting the sequence into a driving signal of a power switch, and controlling an operation of the quasi-Z-source simplified three-level inverter.

Common-mode voltage suppression method and system for quasi-z-source simplified three-level inverter

A neutral-point voltage balance control method and system for a three-level converter in a full power factor range. The method includes: using a large, medium, and zero vector modulation method to synthesize a reference voltage vector, and duty cycles of a large vector, a medium vector, and a zero vector; obtaining a voltage difference between two dc-link capacitors of signal acquisition, and the voltage difference as a neutral-point potential of the three-level converter; according to a value relationship between the neutral-point potential of the three-level converter and a specified threshold, selecting a small vector and calculating a duty cycle of the small vector; and updating a duty cycle of each basic vector, and obtaining a switching sequence for controlling a power switch of a three-phase bridge arm. An amplitude of a common-mode voltage of an NPC three-level converter is equal to one sixth of a dc-link voltage.

Neutral-point voltage balance control method and system for three-level converter in full power factor range

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Jinan, China

Changwei Qin