Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Changjun Lee

Jungbae Hwang

Youngmin Lee

Mantae Hwang

Dongwoo Shin

Philjae Hwang

Taekgi Lee

Eunji Sung

Hyojin Ahn

Seoyeong Lee

Sangwoo Kim

Yongjun Cho

Gyuseok Choe

Hoon Jo

Seongwan Hong

Jinmyung Yoon

Eunkak Kim

Jeongmin Seo

Seongkuk Kim

Dayeon Kim

There is provided a storage device which includes a nonvolatile memory device that includes a first area and a second area, and a controller that receives a first command from an external host device, generates a physical address by performing first error correction decoding on a physical address entry included in the first command, reads first data from the second area of the nonvolatile memory device by using the physical address, and outputs the first data to the external host device. When the first error correction decoding fails, the controller reads first map data from the first area from the nonvolatile memory device, translates a logical address included in the first command into the physical address by using the first map data, reads the first data from the second area of the nonvolatile memory device by using the physical address, and outputs the first data to the external host device.

Storage device including nonvolatile memory device and controller

The present disclosure provides apparatuses and methods for operating a flash memory for programming operating system (OS) data before an surface mount technology (SMT) process. In some embodiments, the method includes erasing a plurality of memory cells in a memory block, reducing a lateral charge loss of the plurality of memory cells due to high temperature degradation during the SMT process by applying a pre-program voltage to word lines coupled to the memory block, and performing multi-bit programming of the OS data in the plurality of memory cells, prior to performing the SMT process. The applying of the pre-program voltage causes threshold voltages of the plurality of memory cells to increase.

Flash memory for reducing reliability degradation of OS data due to SMT process

An operating method of a storage device, including a core and a memory, includes receiving a first processing code configured to enable execution of a first task and storing the first processing code in a first logical unit separately allocated in the memory for near-data processing (NDP), in response to a write command received from a host device, activating the core for executing the first processing code, in response to an activation command received from the host device, and executing the first task by using the core, in response to an execution command received from the host device.

Storage device for executing processing code and operating method of the storage device

An operating method of a storage device including a memory controller and a non-volatile memory, the method including: performing a first read in response to a read request by reading data from the non-volatile memory using a default read voltage set; and performing a second read when the first read fails, by calculating a degradation compensation level, using a weight table, offset table, and displacement level, calculating a history read voltage set by performing an operation on the default read voltage set and degradation compensation level, and reading the data using the history read voltage set, wherein the weight table includes weights preset according to word line groups and state read voltages, the offset table includes offset levels preset according to the word line groups and the state read voltages, and the displacement level corresponds to a difference between a default read voltage level and an optimal read voltage level.

Memory controller, a storage device, and an operating method of the storage device preliminary class

A memory device, an electronic device, and a method of operating the memory device are provided. The memory device includes: a volatile memory including a plurality of memory cells, a plurality of word lines and a plurality of bit lines, and configured to provide output data stored in target memory cells, among the plurality of memory cells, based on a first read command and an address received from a host; a recovery logic circuit configured to provide hint data indicating first bit lines to which defective cells are connected, and second bit lines to which normal cells are connected, among the plurality of bit lines; and an Error Correction Circuit (ECC) configured to generate corrected data by correcting an error in the output data based on the output data and the hint data, and to provide the corrected data to the host.

Memory device, electronic device and operating method of memory device

A vacuum cleaner of the present invention comprises: a main body having a suction motor for generating suction force; a main PCB capable of generating a control command for the suction motor; a handle part capable of accommodating the main body PCB; and a connector provided at the main body, and to which the main PCB is connected in a process of coupling the handle part to the main body. The main PCB includes a plurality of pads and a slit, and the connector includes: a plurality of connecting pins for making contact with the plurality of pads; and a slit insertion protrusion inserted into the slit.

Vacuum cleaner

Provided are a cleaner having a circulation system of collecting water used in damp cloth, filtering the same, and supplying the filtered water to the cloth, and a control method thereof. The cleaner includes a storage unit storing water, a collecting unit intaking water used in a cloth and introducing intaken water to an upper side of the storage unit, a filter unit filtering water collected by the collecting unit, a water supply unit allowing water within the storage unit to flow out from a lower portion of the storage unit so as to be supplied to the cloth, a vacuum motor operated to cause water to be intaken to the storage unit through the collecting unit, and a pump operate to allow water to be transferred through the water supply unit.

Cleaner and control method thereof

Growing community of inventors

Seoul, South Korea

Changjun Lee