National Semiconductor Corporation

Altera Corporation

Electronics and Telecommunications Research Institute

Chang Y Choo

Xiaonong Ran

Asher Hazanchuk

In Ki Hwang

Mohammad R Motamedi

Christine A Porter

Disclosed is an apparatus and method for cancelling a wideband acoustic echo that controls a data flow of data that is transmitted and received using a central processing unit, and calculates data using a calculation processing unit configured to be distinct from the central processing unit.

Apparatus and method for cancelling wideband acoustic echo

Efficient implementation of arithmetic circuits in programmable logic devices by using Look-Up Tables (LUTs) to store pre-calculated values. A table look-up operation is performed in place of complex arithmetic operations. In this way, at the expense of a few LUTs, many logic elements can be saved. This approach is particularly applicable to circuits for calculating reciprocal values and circuits for performing normalized LMS algorithm.

Apparatus and method for implementing efficient arithmetic circuits in programmable logic devices

A video decoding and display system uses temporal post-processing to smooth motion in a displayed moving image. The temporal post-processing uses motion vectors each of which indicates visually similar areas, in first and second frames to generate interpolated motion vectors which match areas in an interpolated frame to visually similar areas in the first and second frames. In one embodiment, each component of each motion vector is divided by two and used to generate an interpolated frame half way between the first and second frames. Display of the first and second frames are delayed so that the interpolated frame is displayed at a time half way between the display times of the first and second frames.

Motion vector based frame insertion process for increasing the frame rate of moving images

A hashing-based vector quantization process partitions a codebook into buckets. A hashing function determines the locations of buckets in the codebook and is selected so that buckets containing similar codevectors start near each other in the codebook. One hashing function forms an index from the most significant bits of components of a vector. During encoding, the hashing function generates an index from an input vector, and a search for a codevector matching the image vector begins in a bucket indicated by the index. In one embodiment, the codebook contains flag fields to indicate the starts of buckets and pointer fields to create linked lists of codevectors which form the buckets. Codevectors are compared to the input vector by determining the mean squared error of the difference between the codevector and the input vector. A search is complete when the search finds a codevector having a difference with a MSE less than a threshold. Search time is reduced because each search begins in a bucket likely to contain a codevector matching the image vector.

Hashing-based vector quantization

A video decoding and display system uses temporal post-processing to smooth motion in a displayed moving image. The temporal post-processing uses motion vectors each of which indicates visually similar areas in first and second frames to generate interpolated motion vectors which match areas in an interpolated frame to visually similar areas in the first and second frames. In one embodiment, each component of each motion vector is divided by two and used to generate an interpolated frame half way between the first and second frames. Display of the first and second frames are delayed so that the interpolated frame is displayed at a time half way between the display times of the first and second frames.

Motion vector based frame insertion process for increasing the frame

A coder/decoder selects one of a set of look-up tables for encoding/decoding a symbol. Each look-up table contains boundary values that result from an arithmetic coding model partitioning a first interval. A second interval contains an arithmetic code. During encoding, look-up table entries for a symbol value are converted to the scale of the second interval. The scaled values indicate a smaller interval containing the arithmetic code. Code bits are generated when most significant bits of upper and lower scaled values are equal. During decoding, a code word, which is a part of an arithmetic code, is normalized from the scale of the second interval to the scale for a look-up table and then compared to entries of the look-up table. When a segment containing the code word is identified, a decoded symbol value is known. A scaling circuit converts boundary values for the segment to the scale of the second interval then changes the second interval. Identical most significant bits in the boundary values are shifted out of a register to prevent overflow during encoding/decoding. To increase the effective size of the register, the next to most significant bit can be removed while a counter counts the number of bits removed.

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San Jose, CA, United States of America

Chang Y Choo