Samsung Electronics Co., Ltd.

Chang-Wook Moon

Dong-wook Kim

In-kyeong Yoo

Joong S Jeon

El Mostafa Bourim

Eun-hong Lee

In-Kyeong Yoo

Hyun-deok Yang

Nae-in Lee

Hwa-Sung Rhee

Choong-Rae Cho

Seung-woon Lee

Weiwei Chen

Shigenobu Maeda

Sung-Jin Lee

Ho Young Lee

Jung-hyun Lee

Jung-hoe Kim

Suk-Pil Kim

Sang-mock Lee

Yun-Sang Oh

Dong-Soo Kim

Sung-Il Cho

Sung-Bong Kim

Sang-Pil Sim

Chang-Hoon Choi

Dong-joon Ma

Dong-hun Lee

Hyung-Soon Jang

Yuri Nikolaevich Tolmachev

Choong-rae Cho

Sung-il Cho

Chang-hoon Choi

Soo-hwan Jeong

Stefanovich Genrikh

Se-Young Cho

In-sook Kim

Kang-suk Lee

Myung-Gon Song

Yeon-Sik Park

Sidorkin Vadim

Hea-young Yoon

Sang-bok Nam

Chi-woong Mun

Ronald F Holsinger

Semiconductor devices are provided. The semiconductor devices include a first fin; a first gate electrode intersecting the first fin; a first elevated source and/or drain on respective sides of the first gate electrode on the first fin; and a first field dielectric film adjacent the first fin. The first field dielectric film includes a first part below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain.

Semiconductor devices having fin shaped channels

A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate insulation layer formed on a silicon substrate, at least one nanorod embedded in the gate insulation layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate insulation layer between the source electrode and the drain electrode.

Field effect transistor having germanium nanorod and method of manufacturing the same

A nonvolatile memory device may include a lower electrode, an oxide layer including an amorphous alloy metal oxide disposed on the lower electrode, and a diode structure disposed on the oxide layer.

Nonvolatile memory device including amorphous alloy metal oxide layer and method of manufacturing the same

Example embodiments relate to a method of forming a germanium (Ge) silicide layer, a semiconductor device including the Ge silicide layer, and a method of manufacturing the semiconductor device. A method of forming a Ge silicide layer according to example embodiments may include forming a metal layer including vanadium (V) on a silicon germanium (SiGe) layer. The metal layer may have a multiple-layer structure and may further include at least one of platinum (Pt) and nickel (Ni). The metal layer may be annealed to form the germanium silicide layer. The annealing may be performed using a laser spike annealing (LSA) method.

Germanium silicide layer including vanadium, platinum, and nickel

Nonvolatile memory devices may be fabricated to include a switching device on a substrate and/or a storage node electrically connected to the switching device. A storage node may include a lower metal layer electrically connected to the switching device, a first insulating layer, a middle metal layer, a second insulating layer, an upper metal layer, a carbon nanotube layer, and/or a passivation layer stacked on the lower metal layer.

Methods of fabricating non-volatile memory devices having carbon nanotube layer and passivation layer

A non-volatile memory device includes a first oxide layer, a second oxide layer and a buffer layer formed on a lower electrode. An upper electrode is formed on the buffer layer. In one example, the lower electrode is composed of at least one of Pt, Ru, Ir, IrOx and an alloy thereof, the second oxide layer is a transition metal oxide, the buffer layer is composed of a p-type oxide and the upper electrode is composed of a material selected from Ni, Co, Cr, W, Cu or an alloy thereof.

Non-volatile memory devices including variable resistance material

Example embodiments may provide nonvolatile memory devices and example methods of fabricating nonvolatile memory devices. Example embodiment nonvolatile memory devices may include a switching device on a substrate and/or a storage node electrically connected to the switching device. A storage node may include a lower metal layer electrically connected to the switching device, a first insulating layer, a middle metal layer, a second insulating layer, an upper metal layer, a carbon nanotube layer, and/or a passivation layer stacked on the lower metal layer.

Nonvolatile memory devices and methods of fabricating the same

Method of forming a germanium silicide layer, semiconductor device including the germanium silicide layer, and method of manufacturing the semiconductor device

A storage node having a metal-insulator-metal structure, a non-volatile memory device including a storage node having a metal-insulator-metal (MIM) structure and a method of operating the same are provided. The memory device may include a switching element and a storage node connected to the switching element. The storage node may include a first metal layer, a first insulating layer and a second metal layer, sequentially stacked, and a nano-structure layer. The storage node may further include a second insulating layer and a third metal layer. The nano-structure layer, which is used as a carbon nano-structure layer, may include at least one fullerene layer.

Storage node having a metal-insulator-metal structure, non-volatile memory device including a storage node having a metal-insulator-metal structure and method of operating the same

A surface electron emission device array and a TFT inspection system for inspecting a TFT array using a surface electron emission device array may be provided. The TFT inspection system may include a surface electron emission device array, which may have a first electrode disposed to face the TFT array in a first direction, a second electrode disposed in a second direction intersecting the first direction in a region corresponding to a region in which the first electrode and a corresponding pixel electrode of the TFT array may be formed, and an insulating layer interposed between the first electrode and the second electrode.

Surface electron emission device array and thin film transistor inspection system using the same

A focusing apparatus and a lithography system using the same capable of adjusting a uniformity of an electromagnetic field by moving a portion of a magnetic field generator. The focusing apparatus may control a path of an electron beam generated from an electron-beam emitter of the lithography system. In the focusing apparatus, a uniformity of the magnetic field in the vacuum chamber may be adjusted through movement of the portion of the magnetic field generator with respect to the vacuum chamber.

Focusing apparatus and lithography system using the same

An electrode structure having at least two oxide layers that more reliably switch and operate without the use of additional devices and a non-volatile memory device having the same are provided. The electrode structure may include a lower electrode, a first oxide layer formed on the lower electrode, a second oxide layer formed on the first oxide layer and an upper electrode formed on the second oxide layer wherein at least one of the first and second oxide layers may be formed of a resistance-varying material. The first oxide layer may be formed of an oxide having a variable oxidation state.

Electrode structure having at least two oxide layers and non-volatile memory device having the same

An emitter for an electron-beam projection lithography system includes a photoconductor substrate, an insulating layer formed on a front surface of the photoconductor substrate, a gate electrode layer formed on the insulating layer, and a base electrode layer formed on a rear surface of the photoconductor substrate and formed of a transparent conductive material. In operation of the emitter, a voltage is applied between the base electrode and the gate electrode layer, light is projected onto a portion of the photoconductor substrate to convert the portion of the photoconductor substrate into a conductor such that electrons are emitted only from the partial portion where the light is projected. Since the emitter can partially emit electrons, partial correcting, patterning or repairing of a subject electron-resist can be realized.

Emitter for electron-beam projection lithography system, and method of manufacturing and operating the emitter

A method for projecting a predetermined pattern of an electron beam from an emitter to a wafer in a vacuum chamber of an electron-beam lithography system is provided. An initial condition for performing an electromagnetic focusing is first set and outspread phenomenon of the electron beam, which is caused by an initial emitting velocity difference and an initial emitting angle difference between electrons emitted from the emitter, is corrected. Then, a shift of the electron beam, which is caused when an electric field is not in parallel with a magnetic field, is corrected and a shift of the electron beam, which is caused by a gradient of the magnetic field, is corrected, after which an increase of a beam diameter of the electron beam, which is caused by Coulomb-interaction between the electrons emitted from the emitter, is corrected. Then, it is determined if a focusing error is within a range of an allowable error. When it is determined the focusing error is out of the range of the allowable error, the above operations are repeated.

Electromagnetic focusing method for electron-beam lithography system

An electron beam lithography apparatus for providing one-to-one or x-to-one projection of a pattern includes a pyroelectric emitter, which is disposed a predetermined distance apart from a substrate holder, the pyroelectric emitter including a pyroelectric plate having a dielectric plate on a surface thereof and a patterned semiconductor thin film on the dielectric plate facing the substrate holder, a heating source for heating the pyroelectric emitter, and either a pair of magnets disposed beyond the pyroelectric emitter and the substrate holder, respectively, or a deflection unit disposed between the pyroelectric emitter and the substrate holder, to control paths of electrons emitted by the pyroelectric emitter. In operation, when the pyroelectric emitter is heated in a vacuum, electrons are emitted from portions of the pyroelectric plate that are not covered by the patterned semiconductor thin film.

Electron beam lithography apparatus using a patterned emitter and method of fabricating the patterned emitter

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Seoul, South Korea

Chang-Wook Moon