Skhynix Inc.

Hynix Semiconductor Inc.

Korea Institute of Industrial Technology

Korea Institute of Energy Research

Korea Institute of Machinery & Materials

Chang Won Yang

Uen Do Lee

Jong Hyun Wang

Young Doo Kim

Ji Hong Moon

Se Chun Park

Dong Ho Park

Duck Ju Kim

Sam Kyu Won

Cheul Hee Koo

Hwang Huh

Jeong Woo Lee

Seong Hun Park

Won Kil Yang

Kwang Soo Kim

Jin Su Park

Kwang Ho Baek

Young Cheol Park

Chang Hyuk Lee

Jong Su Kim

Byoung Sung Yoo

Won Suk Yang

Jae Goo Lee

Myung Jin Park

Byung Ryeul Bang

Hyun Seol Park

Chung Kyu Lee

Tae U Yu

Soo Hwa Jeong

Myung Won Seo

Jae-goo Lee

Do Won Shun

Dal Hee Bae

Tae Young Mun

Sang In Keel

ChungKyu Lee

Byeong Ryeol Bang

Joon Mok Shim

Pil Woo Heo

Jong Ho Moon

Beom Jong Kim

Tae Young Chae

Sung Ho Jo

Wong Yang

Yun Tae Hwang

Jin Han Yun

Soo-Hwa Jeong

Disclosed herein are a fluid sand falling type circulating fluidized bed boiler with a plurality of risers for preventing erosion and corrosion of water tubes and increasing combustion efficiency, and a method of operating the same. The fluid sand falling type circulating fluidized bed boiler with a plurality of risers includes a boiler section into which fuel and oxidizer are injected, a riser section connected to the boiler section so that the fuel and fluid sand supplied from the boiler section are introduced from the bottom of the riser section and flow up, and a relay section provided on the boiler section to supply the fluid sand having passed through the riser section to the boiler section, wherein the fuel is injected from the top of the boiler section and burned while flowing down therein.

Fluid sand falling type circulating fluidized bed boiler with a plurality of risers and method of operating the same

The present invention relates to a combustor-independent fluidized bed indirect gasification system for technology for obtaining high quality synthetic gas through effective indirect gasification of low quality fuels, such as biomass/waste/coal, having various properties, and provides a combustor-independent fluidized bed indirect gasification system comprising: a pre-processor having a sorter; a gasifierto which a first fuel sorted in the pre-processor is supplied; a combustorto which a second fuel sorted in the pre-processor is supplied; and a riserconnecting the gasifierand the combustorand having functions of increasing the temperature of a bed material and transferring the bed material therein.

Combustor-independent fluidized bed indirect gasification system

The present invention relates to a gasification apparatus and a gasification method, the apparatus comprising: a reactor for gasifying fuel; a fuel supply part for supplying fuel to the reactor; and a dispersion plate for spraying fuel, so as to enhance reactivity in the reactor, and aerosolizing moisture within fuel, thereby uniformly supplying fuel to the reactor, wherein the dispersion plate, in a state of being charged by receiving power, is configured to electrostatically spray fuel and a gasification agent, thereby producing a micro droplet, and atomizing the same. Accordingly, it is possible to aerosolize fuel using a boiling phenomenon or an electrostatic spray phenomenon, and uniformly supply fuel to the reactor. Also, it is possible to obtain the effect of increasing gasification reaction efficiency by preheating and reforming fuel and moisture through mid-low temperature oxidation prior to supplying the same the reactor.

Gasification apparatus and gasification method

A semiconductor memory device may include a memory cell array, two or more global word lines, and two or more path circuits. The two or more global word lines may be coupled to word lines in parallel. At least one of the two or more path circuits may be coupled between portions of each word line portions of each word line. Each path circuit may couple one of the global word lines to one of the word lines.

Semiconductor memory device

An embodiment of the present invention is directed to a pyrolysis device including a reactor in which an injected raw material and a melted liquid metal are present together, a circulating pump connected to the reactor, a buffer tank disposed on an upper portion of the reactor and receiving the liquid metal from the circulating pump, a nozzle coupled with the buffer tank and jetting the liquid metal within the buffer tank into the reactor, a separating apparatus separating pyrolyzed char and slag, and a combustion furnace connected to the reactor to combust the fuel supplied from the reactor and supply heat to the reactor, thereby reacting the liquid metal sprays jetted from the nozzle with gases generated in the reactor to purify the gases.

Apparatus for pyrolysis using molten metal

The present invention provides a hybrid gasification system which simultaneously has the advantages of an entrained-flow gasifier using pulverized fuel and a fluidized-bed gasifier utilized for gasifying fuel with relatively various properties. The present intention provides a hybrid gasification system employing a structure in which a second reaction chamber operated at a temperature of 700 to 900 is surrounded by a first reaction chamber operated at temperature, thereby obtaining an insulation effect, performing additional heat exchange, and minimizing a heat loss. Furthermore, the present invention provides a hybrid gasification system having a structure in which unreacted substances and tar within synthetic gas generated from a first reaction chamber reacts within a second reaction chamber, thereby increasing the entire gasification efficiency.

Hybrid gasification system

The present invention relates to a pyrolysis device using a liquid metal including: a hollow reactor in which the liquid metal is received; a circulating pump connected to the reactor; a buffer tank disposed on an upper portion of the reactor and receiving the liquid metal from the circulating pump; a nozzle coupled with the buffet tank and jetting the liquid metal within the buffer tank into the reactor; and an air supply source supplying air to the liquid metal within the reactor, wherein char generated from fuel injected into the reactor is combusted by reacting with air introduced into a lower portion' of the reactor through the air supply source, and liquid metal sprays jetted from the nozzle react with gases generated in the reactor to purify the gases.

Pyrolysis apparatus using liquid metal

The semiconductor memory device includes a memory cell array that includes a plurality of cell strings coupled between a common source line and a plurality of bit lines, a peripheral circuit that reads data stored in a selected memory cell, a bouncing detection circuit that compares a voltage supplied to the common source line and a reference voltage to thereby output a detection signal while performing a reading operation, and a control circuit that controls the peripheral circuit in order to perform the reading operation by adjusting the number of sensing operation times in accordance with the detection signal.

Semiconductor memory device having bouncing detection circuit and method of operating the same

A nonvolatile semiconductor memory apparatus includes a memory cell block, a plurality of page buffers, and a reference page buffer unit. The memory cell block includes a plurality of memory cell strings each of which includes a plurality of memory cells and a dummy memory cell string which includes a plurality of dummy memory cells. The page buffers sense data stored in the memory cells and apply the sensed data to an output node. The reference page buffer unit senses the dummy memory cells and adjusts the timing to apply the values sensed by the page buffers to the output node.

Nonvolatile semiconductor memory apparatus and data sensing method thereof

An operating method of a semiconductor device includes precharging bit lines corresponding to selected memory cells, supplying a first verify voltage to a word line coupled to the selected memory cells and outputting programming states of the selected memory cells to the bit lines during a first time period, sensing potentials of the bit lines that have the programming states of the selected memory cells outputted to the bit lines during the first time period, supplying a first target voltage higher than the first verify voltage to the word line and outputting programming states of the selected memory cells to the bit lines during a second time period shorter than the first time period, and sensing potentials of the bit lines that have the programming states of the selected memory cells outputted to the bit lines during the second time period.

Semiconductor device and operating method thereof

A semiconductor memory device includes memory cells for storing data, page buffers each configured to comprise a dynamic latch and a static latch on which data to be programmed in to the memory cells or data read from the memory cells are latched, and a control logic configured to store a plurality of refresh mode select codes corresponding to various refresh cycles, and refresh the dynamic latch by exchanging data between the static latch and the dynamic latch according to a refresh cycle corresponding to a selected refresh mode select code.

Semiconductor memory device and method of operating the same

A semiconductor device includes cell strings that each include a plurality of memory cells, a page buffer having latches coupled to bit lines and precharge the bit lines in response to page buffer control signals, a page buffer control circuit configured to generate the page buffer control signals using a high voltage source, and a controller configured to generate control signals for controlling the page buffer control circuit.

Semiconductor device and method of operating the same

A programming method comprised of: classifying memory cells to be programmed into first, second and third levels; applying a program inhibition voltage to an unselected bit line, applying a ground voltage to bit lines, which are coupled with memory cells that are to be programmed into the third level, among selected bit lines, and applying a first voltage, which is lower than the program inhibition voltage but higher than a ground voltage, to bit lines coupled with memory cells that are to be programmed into the second level, and applying a second voltage, which is lower than the program inhibition voltage but higher than the first voltage, to bit line coupled with memory cells that are to be programmed into the first level; and supplying a program voltage, which gradually increases, to a selected word line coupled with the memory cells while applying the voltages to the bit lines.

Semiconductor memory device and programming method thereof

Multi-level cell programming methods are provided. A method includes providing a page buffer including first and second registers connected to first and second memory cell blocks, respectively. A least significant bit (LSB) program of each memory cell is completed. Most significant bit (MSB) data is set in a first node of the first register. An MSB program is performed. When the MSB program is performed at a first verify voltage, first data at a first voltage level is set in the first node. When the MSB program is performed at a second verify voltage, second data at a second voltage level, opposite to the first voltage level, is set in the first node. When the MSB program is performed at a third verify voltage, the first data is set in the first node. The MSB program is repeated according to the first node data.

Page buffer of non-volatile memory device and programming method of non-volatile memory device

A page buffer circuit comprises a bit line selection unit, a latch unit, and a bit line control unit. The bit line selection unit is configured to select a bit line coupled to memory cells. The latch unit comprises a plurality of latch circuits. The plurality of latch circuits is coupled to a sense node and configured to latch data to be programmed into the memory cells or store data from the memory cells. The bit line control unit is coupled to the sense node and configured to temporarily charge a voltage of the selected bit line in response to charge and transfer control signals or transfer the charged voltage to the selected bit line.

Page buffer circuit, nonvolatile memory device including the page buffer circuit, and method of operating the nonvolatile memory device

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Incheon, South Korea

Chang Won Yang