Samsung Electronics Co., Ltd.

Chang-Rae Jeong

Tae-Young Lee

Mi-Hyun Son

Gui-Jung Lee

Byung-Tae Yoon

Tae-Hoon Park

Jong-Wook Zeong

Hak-Sul Kim

Byung-Woog Bae

Seung-Hyeok Na

An electronic device includes a main board, a ground plate, at least one antenna, and at least one cable. The ground plate is disposed on the main board and include at least one cable containing groove containing at least a part of the at least one cable. The at least one antenna is disposed on the ground plate and electrically connected to the ground plate. The at least one cable electrically connects the at least one antenna with the main board and is at least partially disposed in the at least one cable containing groove.

Electronic device including antenna

An apparatus for converting pulse code modulation (PCM) signals in a telecommunication system between two different modulation standards. In the apparatus, a channel selector generates a channel select signal for identifying at least one channel of the multiple channels containing input digital signals modulated by said one of said two different modulation standards. A first codec demodulates a signal on a channel designated by the channel select signal which is modulated by the first modulation standard, into an analog signal to be supplied to a second codec, which modulates the converted analog signal input into a digital signal using the second modulation standard. The reverse process is executed in a similar manner. A second codec using the second modulation standard demodulates a digital signal on the channel designated by the channel select signal into an analog signal to be supplied to the first codec, and the first codec in turn modulates the converted analog signal into a digital signal using the first modulation standard. As a result, the present invention is able to convert pulse code modulation signals from either one of two different modulation standards to the other one of said two different modulation standards in a telecommunication system.

Apparatus for converting PCM signal

A multi-sector in-building repeater, including: a master transmitting unit for receiving multi-sector signals of a carrier from a base station, mixing the multi-sector signals with different transmission intermediate frequency signals, and outputting mixed multi-sector signals to a same transmission line; a plurality of slave transmitting units for extracting sector signals assigned to the multi-sector signals from the master transmitting unit, converting extracted sector signals into high frequency signals, and transmitting converted high frequency signals through an antenna to a mobile terminal.

Multi-sector in-building repeater

A data translation apparatus is between a base station using an Internet protocol (IP) and a cell controller using an asynchronous transfer mode (ATM) data in a mobile communication system. The apparatus includes a plurality of line interface devices for performing a data connection with the cell controller, a physical layer processor for performing a physical layer process on a data received through the line interface device, a universal test and operations physical layer protocol interface for ATM (UTOPIA) switch for performing a switching process for translating and transmitting ATM data received from a cell controller and data received from an IP base station, a data translator for translating data to be transmitted to the UTOPIA switch into asynchronous transfer mode adaptation layer 0 (AAL0) data, and for translating data to be transmitted to the IP base station into Ethernet data, a plurality of repeaters for transceiving data between the IP base station and the data translator, a UTOPIA mapper for performing a UTOPIA interface on the data from the UTOPIA switch, a layer converter for converting the data from the UTOPIA interface to AAL0 layer or AAL2 layer data, and a controller for controlling operations of the layer converter, the UTOPIA mapper, and the UTOPIA switch.

Data translation apparatus of ATM in mobile communication system

A digital trunk circuit supporting multiple trunk circuits assembled in a single board. A trunk selector capable of being operated by a user, outputs trunk select information for selecting one of the multiple trunk circuits according to an operation of the user. A read only memory (ROM) stores drive programs for the respective trunk circuits. A framer and line interface serves as a T framer or an E framer according to a register value, and includes line interface nodes having a connection for the T framer or the E framer. A receiving transformer connected to an office line, receives a signal incoming from the office line. A transmission transformer connected to the office line, transmits a signal to the office line. A relay switch including a plurality of relays connected between the receiving transformer and the line interface nodes of the framer and line interface and between the transmission transformer and the line interface nodes, provides a receiving path between the line interface nodes and the receiving transformer and a transmission path between the line interface nodes and the transmission transformer, in response to relay drive control signals. A first processor determines a trunk circuit to be driven depending on the trunk select information output from the trunk selector, drives an associated drive program stored in the read only memory according to the determination result, generates a register value for determining an operation mode for a framer of the framer and line interface to provide the generated register value to the framer and line interface, and generates the relay drive control signals to provide the generated relay drive control signals to the relay switch.

Digital trunk circuit supporting multiple trunk circuits

A synchronous clock controller for a digital exchange accommodates installation of a plurality of office line cards. A priority encoder encodes priority information signals respectively provided from the office line cards, and generates a selection signal indicating one of the office line cards having a highest priority among the office line cards in dependence upon the priority information signals. A clock selector receives office line clock signals respectively provided from the office line cards, and outputs a selected one of the office line clock signals provided from the office line card indicated by the selection signal. A digital phase synchronizing circuit phase synchronizes the selected office line clock signal with an internal reference clock signal, and generates a reference synchronization clock signal and a bit synchronization clock signal in response to the phase synchronizing.

Growing community of inventors

Seoul, South Korea

Chang-Rae Jeong