Soongsil University

Hynix Semiconductor Inc.

Skhynix Inc.

Samsung Electronics Co., Ltd.

Chang Kun Park

Sung Woo Han

Yong Ju Kim

Hyung Soo Kim

Tae Jin Hwang

Hae Rang Choi

Jae Min Jang

Ic Su Oh

Ji Wang Lee

Hee Woong Song

Jong Hoon Park

Chang Hyun Lee

Ho Yong Hwang

Seong Hwi Song

Mi Lim Lee

Ja Yoon Koo

Byung Joo Kang

Gi Hoon Park

Jae Ook Kwon

Jeung Hyung Park

Seong Woong Cho

Ji Sung Jo

Sung Hun Ahn

Hoo Young Shin

Joon Young Park

Ga Yeon Ko

Dae Eun Hyun

Eun Ae Cho

According to an embodiment, an image display device includes: a display; a memory storing one or more instructions; and a processor executing the one or more instructions stored in the memory, wherein the processor executes the one or more instructions: to determine whether it is a recommended time for outputting advertisement content, from a user's log data, based on a first trained model using one or more neural networks; to determine a recommended attribute of an advertisement display region from the user's log data, based on a second trained model using the one or more neural networks, when it is determined that it is the recommended time for outputting the advertisement content; and to adjust an attribute of the advertisement display region based on the determined recommended attribute and control the display to output the advertisement content in the attribute-adjusted advertisement display region.

Display device and operation method thereof

Disclosed is a method of manufacturing an intraocular pressure sensor that is put into an eyeball of a patient and measures the intraocular pressure, the method comprising: preparing a first substrate; depositing a base film on the bottom of the first substrate; exposing the top of the base film by etching the first substrate; applying epoxy onto the center of the exposed base film; disposing the first electrode at the epoxy-applied portion on the base film; preparing a second substrate; depositing a support film onto the second substrate; forming a second electrode on the support film; exposing the bottom of the support film by etching the second substrate; and disposing the second substrate onto the first substrate.

Intraocular pressure sensor and method for manufacturing same

The present invention relates to a high frequency transformer for a differential amplifier. An exemplary embodiment of the present invention provides a high frequency transformer for a differential amplifier, including: a first metal line that is integrated and formed in an IC chip through a CMOS process and that is connected to a differential signal line of a transistor included in the IC chip; and a second metal line that is formed in an MEMS chip through an MEMS process and that is inductively coupled with the first metal line in a state spaced apart from an upper portion of the first metal line, wherein the MEMS chip may be stacked on an upper portion of the IC chip.

RF transformer for differential amplifier

The present invention related to a varactor used in an integrated circuit of a differential structure. An exemplary embodiment of the present invention provides a variable capacitor connected between first and second signal lines which are differential signal lines included in an integrated circuit of a differential structure, including: a plurality of N-type semiconductors separately arranged; one or more P-type semiconductors disposed between the N-type semiconductors to make first and second PN junctions with N-type semiconductors contacting upper and lower portions thereof and to receive a control voltage, wherein, among the N-type semiconductors, first N-type semiconductors corresponding to (2n&#x2212;1)-th (n being a positive integer) are connected with the first signal line, and second N-type semiconductors corresponding to 2n-th are connected with the second signal line, and parasitic capacitances of the first and second PN junctions are varied by adjusting the control voltage.

Variable capacitor used in integrated circuit of differential structure

A power amplifier having a stack structure comprises a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.

Power amplifier having stack structure

Disclosed herein is a linear amplifier using a nonlinear amplifying stage which includes a first amplifier and a second amplifier connected in cascade, including: a bias voltage generator in which a first bias voltage is applied to a gate terminal of the first amplifier, and a second bias voltage higher than the first bias voltage is applied to a gate terminal of the second amplifier, wherein the first amplifier and the second amplifier have a nonlinear gain characteristic in a region of arbitrary output power, and as the output power increases in the region of arbitrary output power, a gain of the first amplifier increases, while a gain of the second amplifier decreases.

Linear amplifier using nonlinear amplifying stage

A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.

Semiconductor memory device having pads

The present disclosure relates to an inverter type power amplifier. An exemplary embodiment of the present disclosure provides an inverter type power amplifier including: a first transistor including a gate to which an AC type of input signal is applied through an input port, a first terminal connected a power source voltage, and a second terminal connected to an output port; a second transistor including a gate through which the input signal is applied thereto, a first terminal connected to a ground, and a second terminal connected to the output port; a feedback resistor including a first terminal connected to the input port and a second terminal connected to the output port; and an AC blocking block including a first terminal connected to the output port and a second terminal connected to a DC output port.

Inverter type power amplifier

A power amplifier having a stack structure, including: a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that has a power input terminal connected with a ground terminal of the first driver stage and receiving a virtual power voltage and an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the second driver stage, and receives and amplifies an output signal from the second driver stage.

Disclosed is an antenna for inter-chip wireless power transmission in a 3D-wireless chip package, wherein the 3D-wireless chip package includes: a first chip transmitting AC power through a transmitting antenna; and a plurality of second chips sequentially stacked on or under the first chip and receiving the AC power from the first chip through receiving antennas, respectively, and the receiving antennas are individually formed on the second chips, respectively, and positioned without vertically overlapping each other over or under the transmitting antenna.

Antenna for inter-chip wireless power transmission

Provided is a wireless chip for chip-to-chip wireless transfer. A wireless chip for chip-to-chip wireless transfer according to the present invention includes: an antenna used as a wireless transfer path of data or power; a circuit unit providing information about whether there is input/output data; a mode control unit connected with the circuit unit and outputting a first or second level signal in accordance with whether there is input/output data; a data communication unit activated and inputting/outputting the data between the circuit unit and the antenna, only when the first level signal is inputted from the mode control unit; and a power relay unit activated and relays the power between the circuit unit and the antenna, only when the second level signal is inputted from the mode control unit.

Wireless chip for chip-to-chip wireless transfer

An oscillator with a differential structure which is formed in an integrated circuit, including: a first transistor and a second transistor in each of which a drain electrode, a gate electrode, and a source electrode are sequentially arranged, a drain of the first transistor is connected with a gate of the second transistor through a first wiring, a drain of the second transistor is connected with a gate of the first transistor through a second wiring, and a first end of a source of the first transistor and a first end of a source of the second transistor are connected through a third wiring, and a second end of the source of the first transistor and a second end of the source of the second transistor are connected through a fourth wiring.

Oscillator with differential structure

Provided is a transmission line transformer having increased signal efficiency. The transmission line transformer is formed on an integrated circuit (IC), wherein a first transmission line disposed in one direction. Second and third transmission lines have same length direction as the first transmission line and are spaced apart from each other in a lateral direction above or below the first transmission line. Accordingly, an area of the first transmission line and areas of the second and third transmission lines, which face each other, are increased, thereby improving a coupling factor. Also, since a secondary transmission line is divided into two regions and uses the second and third transmission lines that have narrower widths than the first transmission line, parasitic capacitance components generated between the first through third transmission lines and a semiconductor substrate may be decreased.

Transmission-line transformer in which signal efficiency is maximised

Disclosed is a differential power amplifier using mode injection, which includes: a first transistor of which the gate receives a first signal and the source is connected to the ground; a second transistor of which the gate receives a second signal and the source is connected to the ground; a third transistor of which the source is connected to the source of the first transistor; a fourth transistor of which the source is connected to the source of the second transistor; a fifth transistor of which the source is connected with the drain of the first transistor and the drain is connected with a first output port and the drain of the third transistor; and a sixth transistor of which the source is connected with the drain of the second transistor and the drain is connected with a second output port and the drain of the fourth transistor.

Growing community of inventors

Gyeonggi-do, South Korea

Chang Kun Park