Samsung Electronics Co., Ltd.

Chang-ki Hong

Bo-un Yoon

Sang-jun Choi

Woo-Gwan Shim

Jeong-Nam Han

Suk-Hun Choi

Jong-Won Lee

Sang-Yong Kim

Byoung-ho Kwon

Jae-Dong Lee

Yoon-Ho Son

Kyung-Hyun Kim

Jung-Min Oh

Hyo-San Lee

Kun-Tack Lee

Joon-Sang Park

Dae-Hyuk Kang

Sang-yeob Han

Jae-dong Lee

Sung-Jun Kim

Ho-young Kim

Ji-Hoon Cha

Kun-tack Lee

Jong-Heun Lim

Seong-Kyu Yun

Jae-Phil Boo

Jae-Kwang Choi

Sang-yong Kim

Dong-Gyun Han

Jang-Eun Heo

Hyung-Ho Ko

Sang-Jin Kim

Sang-rok Hah

Kwang-bok Kim

Hong-soo Kim

Jong-won Lee

Im-Soo Park

Young-rae Park

Chang-Sup Mun

Jung-Yup Kim

Sang-youn Jo

Yu-Kyung Kim

Sung-Ho Shin

Jin-sook Choi

Hyo-san Lee

Jaekwang Choi

Se-Rah Yun

Se-rah Yun

Jung-yup Kim

Jun-yong Kim

Yong-Sun Ko

Min-Young Park

Jae-hyoung Choi

Young-Hoo Kim

Jeong-Heon Park

Yong-Suk Tak

Sung-Il Cho

Seung-Pil Chung

Woo-Sung Han

Moon-han Park

Dae-lok Bae

Hyun-Jun Sim

Sang Jun Choi

Tai-su Park

Kyung-won Park

Jung-min Oh

Go-Un Kim

Ho-kyu Kang

Han-sin Lee

Ja-hyung Han

Yong-sun Ko

Doo-Won Kwon

Choong-Kee Seong

Kwang-Bok Kim

Ju-Young Jung

U-In Chung

Jaedong Lee

Jeong-heon Park

Chae-Iyoung Kim

Ho-wook Choi

Hung-ho Ko

Sang-Yeob Han

Woo-gwam Shim

Chang-Sup Min

Myung-sik Han

Sun-wung Lee

Jae-duk Kim

Myung-Kook Park

Ho-Seok Yang

Dae-Hong Eom

Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers. The wafer treatment method involves performing a predetermined treatment such as etching, cleaning or drying on wafers within only one of the plurality of chambers, followed by wafer treatment on the succeeding chamber, and thus allowing for sequential wafer treatment within each of the plurality of chambers.

Apparatus for treating wafers using supercritical fluid

In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.

Semiconductor device including dummy gate part and method of fabricating the same

A composition for etching a silicon oxide layer, a method of etching a semiconductor device, and a composition for etching a semiconductor device including a silicon oxide layer and a nitride layer including hydrogen fluoride, an anionic polymer, and deionized water, wherein the anionic polymer is included in an amount of about 0.001 to about 2 wt % based on the total weight of the composition for etching a silicon oxide layer, and an etch selectivity of the silicon oxide layer with respect to a nitride layer is about 80 or greater.

Composition for etching silicon oxide layer, method for etching semiconductor device using the same, and composition for etching semiconductor device

A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.

Transistor having a metal nitride layer pattern, etchant and methods of forming the same

A method of fabricating a semiconductor device includes depositing tungsten on an insulating layer in which a contact hole is formed by chemical vapor deposition (CVD), performing chemical mechanical planarization (CMP) on the tungsten to expose the insulating layer and form a tungsten contact plug, and performing rapid thermal oxidation (RTO) on the tungsten contact plug in an oxygen atmosphere such that the tungsten expands volumetrically into tungsten oxide (WO).

Methods of fabricating semiconductor devices and semiconductor devices including a contact plug processed by rapid thermal annealing

Provided may be a slurry composition for chemical mechanical polishing (CMP) and a CMP method using the same. For example, the slurry composition may include a first polishing inhibitor including at least one of POor HPOand a second polishing inhibitor, which may be a C-Chydrocarbon compound having &#x2014;SOH or &#x2014;OSOH. By using the slurry composition for CMP and a CMP method using the same, increased selectivity to SiN may be obtained.

Slurry composition for chemical-mechanical polishing and method of chemical-mechanical polishing with the same

A photo key has a plurality of first regions spaced apart from one another on a semiconductor substrate, and a second region surrounding the first regions, and one of the first regions and the second region constitutes a plurality of photo key regions spaced apart from one another. Each of the photo key regions includes a plurality of first conductive patterns spaced apart from one another; and a plurality of second conductive patterns interposed between the first conductive patterns.

Photo key and method of fabricating semiconductor device using the photo key

A phase-change memory device including a first contact region and a second contact region formed on a semiconductor substrate. A first insulating layer with a first contact hole and a second contact hole is disposed on the semiconductor substrate, exposing the first and second contact regions. A first conductive layer is disposed on the first insulating interlayer to fill the first and the second contact holes. A first protection layer pattern and a lower wiring protection pattern are disposed on the first conductive layer. A first contact with a first electrode and a second contact with a lower wiring are disposed so as to connect the first and second contact regions. A second protection layer with a second electrode is disposed on the first protection layer pattern and the lower wiring protection pattern. A via filled with a phase-change material is disposed between the first electrode and the second electrode.

Phase-change memory device using a variable resistance structure

In methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device, a preliminary ferroelectric layer is formed on a substrate by depositing a metal oxide including lead, zirconium and titanium. The surface of the preliminary ferroelectric layer is polished using a slurry composition including an acrylic acid polymer, abrasive particles, and water to form a thin ferroelectric layer on the substrate. The slurry composition may reduce a polishing rate of the preliminary ferroelectric layer such that removal of a bulk portion of the preliminary ferroelectric layer may be suppressed and the surface roughness of the preliminary ferroelectric layer may be improved.

Methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device including the same

An insulation layer may be formed on an object having a contact region. The insulation layer may be partially etched to form an opening exposing the contact region. A material layer including silicon and oxygen may be formed on the exposed contact region. A metal layer may be formed on the material layer including silicon and oxygen. The material layer including silicon and oxygen may be reacted with the metal layer to form a metal oxide silicide layer at least on the contact region. A conductive layer may be formed on the metal oxide silicide layer to fill up the opening.

Method of forming a contact structure

The present invention provides etchant solutions including deionized water and an organic acid having a carboxyl radical and a hydroxyl radical. Methods of forming magnetic memory devices are also disclosed.

Methods of forming semiconductor devices formed by processes including the use of specific etchant solutions

A method of fabricating a contact plug of a semiconductor device is provided, the method includes forming a gate pattern on a substrate, forming a capping pattern to cover an upper surface and sidewalls of the gate pattern, forming an interlayer insulation layer on the substrate such that the interlayer insulation layer exposes an upper surface of the capping pattern, and removing a portion of the capping pattern and the interlayer insulation layer such that the upper surface of the capping pattern is planarized.

Methods of fabricating a semiconductor device

A slurry composition for polishing metal includes a polymeric polishing accelerating agent, the polymeric polishing accelerating agent including a backbone of hydrocarbon and a side substituent having at least one of a sulfonate ion (SO) and a sulfate ion (OSO), and an acidic aqueous solution.

Slurry compositions for polishing metal, methods of polishing a metal object and methods of forming a metal wiring using the same

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Seongnam-si, South Korea

Chang-ki Hong