Delta Electronics, Inc.

Ancora Semiconductors Inc.

Chang-Jing Yang

Jau-Shiu Chen

Liang-Cheng Wang

Li-Fan Lin

Shih-Yu Yeh

Ying-Chen Liu

Wei-Hsiang Chao

Jen-Chih Li

Yao-Ching Huang

Hong-Sheng Wang

Ting-Chieh Lin

A clamp circuit is provided. The clamp circuit includes a major Gallium Nitride (GaN) transistor, a miller GaN transistor, and a capacitor circuit. The major GaN transistor () includes a major gate, a major drain, and a major source coupled to a first node. The miller GaN transistor includes a miller gate coupled to a second node, a miller drain coupled to the major gate, and a miller source coupled to the first node. The capacitor circuit is coupled between the major drain and the second node.

Clamp circuit

A package structure is provided. The package structure includes a substrate, a plurality of active components, a plurality of separated metal parts and an encapsulation material. The substrate has a first surface and a second surface. Each active component has a first surface and a second surface. Each metal part has a first surface and a second surface. The first surface of each active component is connected to the first surface of the substrate. The first surface of one metal part is connected to the second surface of one active component. Each metal part extends to connect to the first surface of the substrate. The encapsulation material covers the first surface of the substrate and surrounds the active components and the metal parts. The second surface of each metal part and the second surface of the substrate are exposed from the encapsulation material.

Package structures

An integrated circuit includes a first power transistor, a second power transistor, and an isolator. The first power transistor is integrated with a first driving circuit. The second power transistor is integrated with a second driving circuit. The isolator provides a first control signal and a second control signal to the first power transistor and a second power transistor respectively, according to an input signal.

Driving circuit of a power circuit and a package structure thereof

A power circuit includes a power transistor and a driving circuit. The power transistor draws a power current from a loading node according to a voltage of a driving node and stops drawing the power current according to an over-current signal. The driving circuit includes a high-side transistor, a low-side transistor, a charge pump, a pre-driver, and a desaturation circuit. The high-side transistor provides a supply voltage to the driving node according to a high-side voltage of a high-side node. The low-side transistor couples the driving node to the ground according to a first internal signal. The charge pump generates a high-side voltage that exceeds the supply voltage according to the first internal signal. The pre-driver generates the first internal signal according to a control signal. The desaturation circuit determines that the power current exceeds a threshold to generate the over-current signal.

Driving circuit and a desaturation circuit of a power circuit

A power circuit includes a voltage converter, an UVLO circuit, a power transistor, and a driving circuit. The voltage converter converts an external voltage to a supply voltage according to an UVLO signal. The UVLO circuit generates the UVLO signal when the external voltage exceeds a threshold. The power transistor draws a power current according to a voltage of a driving node. The driving circuit includes a high-side transistor, a low-side transistor, a charge pump, and a pre-driver. The high-side transistor provides the supply voltage to the driving node according to a high-side voltage of a high-side node. The low-side transistor couples the driving node to a ground according to a first internal signal. The charge pump generates a high-side voltage that exceeds the supply voltage according to the first internal signal. The pre-driver generates the first internal signal according to a control signal.

Driving circuit and an under-voltage lockout circuit of a power circuit

A power circuit includes a power transistor and a driving circuit. The power transistor sinks a current according to a driving voltage. The driving circuit includes a driver which includes a high-side transistor, a low-side transistor, a high-side driver, and a first pre-driver. The high-side transistor provides a low voltage to the driving voltage according to a high-side voltage. The low-side transistor pulls the driving voltage to a ground according to a control signal. The high-side driver includes a plurality of N-type transistors and provides a high voltage to the high-side voltage according to the control signal. The high voltage exceeds an operational gate voltage of the N-type transistors.

Driving circuit of a power circuit

A regulator converting an input voltage into a supply voltage includes a first differential amplifier, a second differential amplifier, a pass element, and a feedback voltage divider. The first differential amplifier includes a reference voltage with a feedback voltage to generate a first output voltage and a first inverse output voltage. The second differential amplifier compares the first output voltage and the first inverse output voltage to generate a second output voltage. The pass element passes an output current from the input voltage to the supply voltage according to the second output voltage. The feedback voltage divider divides the supply voltage by a feedback factor to generate the feedback voltage.

Driving circuit of a power circuit and a regulator

A power circuit includes a power transistor flowing a power current to a ground according to the voltage of a driving node, a driving circuit, and a pre-driver. The driving circuit includes a high-side transistor providing a supply voltage to the driving node according to a high-side voltage of a high-side node, a low-side transistor coupling the driving node to the ground according to a first internal signal, and a charge pump coupled to the high-side node and the driving node and generating the high-side voltage that exceeds the supply voltage according to the first internal signal. The pre-driver generates the first internal signal according to a control signal. The pre-driver is configured to improve driving capability of the control signal.

A power circuit includes a power transistor sinking a power current according to a voltage of a driving node and a driving circuit which includes a first bootstrap circuit, a second bootstrap circuit receiving a second internal signal to generate a first internal signal, a pre-driver receiving a third internal signal to generate the second internal signal, and a hysteresis circuit receiving a control signal to generate the third internal signal with a hysteresis. The first bootstrap circuit includes a high-side transistor providing a supply voltage to the driving node according to a high-side voltage, a low-side transistor electrically connecting the driving node to the ground according to the first internal signal, and a charge pump generating the high-side voltage exceeding the supply voltage according to the first internal signal and the second internal signal.

A power circuit includes a power transistor flowing a power current to a ground according to the voltage of a driving node, a driving circuit, a first pre-driver, a second pre-driver, and a hysteresis circuit. The driving circuit includes a high-side transistor providing a supply voltage to the driving node according to a high-side voltage of a high-side node, a low-side transistor coupling the driving node to the ground according to a first internal signal, and a charge pump coupled to the high-side node and the driving node and generating the high-side voltage that exceeds the supply voltage according to the first internal signal. The first pre-driver receives a second internal signal to generate the first internal signal. The second pre-driver receives a third internal signal to generate the second internal signal. The hysteresis circuit receives a control signal to generate the third internal signal.

A switching circuit includes a normally-on switch, a normally-off switch, a current compensating unit and a current sharing unit. Each of the normally-on switch and the normally-off switch include a first terminal, a second terminal and a control terminal respectively. The first terminal of the normally-off switch is connected to the second terminal of the normally-on switch. The second terminal of the normally-off switch is connected to the control terminal of the normally-on switch. The current compensating unit is connected to the normally-on switch and configured to generate a compensating current when a leakage current of the normally-on switch is smaller than the leakage current of the normally-off switch. The current sharing unit is connected to the normally-off switch and configured to share the leakage current of the normally-on switch when the leakage current of the normally-on switch is larger than the leakage current of the normally-off switch.

Switching circuit and current compensating method therein

A method for compensating images, applied to an e-paper display where pixels are arranged as a pixel array displaying N-level grayscale images. Standard images from a first standard image to an N-th standard image which respectively correspond to a first-level grayscale value to the N-th-level grayscale value are provided. The e-paper display respectively displays the standard images. Actual grayscale values of each pixel of the e-paper display, from a first actual grayscale value corresponding to the first standard image to the N-th actual grayscale value corresponding to the N-th standard image, are obtained. Each m-th actual grayscale value is compared with an m-th-level grayscale value to generate an m-th compensating matrix, wherein m is a positive integer from 1 to N. Therefore, compensating matrices from a first compensating matrix to an N-th compensating matrix are generated and used to compensate an input image of the e-paper display.

Methods for compensating images and producing built-in compensating matrix set and e-paper display device thereof

A multi-line addressing method and a multi-line addressing apparatus for a bistable display are disclosed, where the multi-line addressing method for a bistable display comprises steps as outlined below. First, a basis matrix based on a digital image is provided. Then, the basis matrix is factorized by searching independent vectors in the basis matrix, thereby reducing the rank of the basis matrix. Then, a plurality of addressing signals based on the factorized basis matrix is sent to a rectangular array of pixels of the bistable display.

Multi-line addressing method and apparatus for bistable display

A halftone image generation method used in a system including a quantizer, a subtracter, a post-dithering module and an adder for generating a halftone image is disclosed. First, an original image including original pixels having original pixel values is received by the quantizer and a quantized image including quantized pixels having quantized pixel values according to a predetermined threshold is generated by the quantizer. The quantized pixel values from the original pixel values are subtracted by the subtracter so as to generate quantization error values. A post-dithering process is performed by the post-dithering module to generate dither values by using the quantization error values. The quantized pixel values of the quantized image are added to the dither values by the adder. Finally, the halftone image including halftone pixels having halftone pixel values is generated.

Halftone image generation method and image processing system and computer program product thereof

An embodiment of the invention provides a driving method for a display unit, wherein the display unit includes a first electrode, and a second electrode disposed opposite to the first electrode, wherein the first electrode is separated from the second electrode by a distance, and a first particle with a polarity is distributed between the first electrode and the second electrode. The driving method includes the steps of: casting a first voltage difference between the first electrode and the second electrode to make the first particle move toward the second electrode; stopping casting of the first voltage difference; and casting a second voltage difference between the first electrode and the second electrode to apply an opposite force to the first particle, wherein the polarity of the second voltage difference is different from that of the first voltage difference.

Growing community of inventors

Taoyuan, Taiwan

Chang-Jing Yang