Samsung Electro-Mechanics Co., Ltd.

Samsung Electronics Co., Ltd.

Chang Hwa Park

Yong Duk Lee

Jin Woo Kim

Chin Mo Kim

Dae Jung Byun

Je Sang Park

Min Gi Sin

Sang Ho Jeong

Ki Ho Na

Jin Won Lee

Jong Ho Lee

Mi Sun Hwang

Hak Kwan Kim

Woo Sup Kim

Hong Seok Kim

Chi Hwa Lee

Byung Hyun Park

Yeo Il Park

Yoo Rim Cha

Jun Hyeong Jang

Jin Su Park

Chi Seong Kim

Youn Gyu Han

Sang Ah Kim

Jae Heun Lee

Deok Man Kang

Gun Hwi Hyung

Eun Heay Lee

Ichiro Ogura

Ga Young Yoo

Yo Han Song

Yu Rim Choi

A printed circuit board includes: a bridge including a first insulating material, a wiring pattern disposed in the first insulating layer, a metal post disposed on the first insulating material and connected to the wiring pattern, and a second insulating material disposed on the first insulating material and covering at least a portion of the metal post; a first build-up insulating material disposed around the bridge; and a first redistribution pattern disposed on the second insulating material and the first build-up insulating material and including a metal pad connected to the metal post.

Printed circuit board

A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first and second internal electrodes disposed to face each other with respective dielectric layers interposed therebetween; and first and second external electrodes disposed on an external surface of the ceramic body, wherein the dielectric layer contains a barium titanate-based powder particle having a core-shell structure including a core and a shell around the core, the shell having a structure in which titanium is partially substituted with an element having the same oxidation number as that of the titanium in the barium titanate-based powder particle and having an ionic radius different from that of the titanium in the barium titanate-based powder particle, and the shell covers at least 30% of a surface of the core.

Dielectric composition and multilayer ceramic capacitor containing the same

An electronic component embedded substrate includes a core structure including a first insulating body and core wiring layers and having a cavity and having a stopper layer disposed as a bottom surface; an electronic component disposed in the cavity and attached to the stopper layer; and a build-up structure including a second insulating body covering at least a portion each of the core structure and the electronic component and filling at least a portion of the cavity, and build-up wiring layers wherein the stopper layer has a first region in which a portion of one surface is exposed from the first insulating body and a second region in which the other portion of one surface is covered with the first insulating body, and a surface roughness of one surface of the stopper layer in the first region is greater than that of the stopper layer in the second region.

Electronic component embedded substrate

A substrate embedded electronic component package includes a core member having a cavity in which a metal layer is disposed on a bottom surface thereof, an electronic component disposed in the cavity, an encapsulant filling at least a portion of the cavity and covering at least a portion of each of the core member and the electronic component, and a connection structure disposed on the encapsulant and including a first wiring layer connected to the electronic component. A wall surface of the cavity has at least one groove portion protruding outwardly from a center of the cavity, and the groove portion extends to a same depth in the core member as a depth of the cavity.

Substrate embedded electronic component package

A substrate having an electronic component embedded therein includes a core structure including a first insulating body and core wiring layers and having a cavity penetrating through a portion of the first insulating body, an electronic component disposed in the cavity, an insulating material covering at least a portion of each of the core structure and the electronic component and disposed in at least a portion of the cavity, a wiring layer disposed on the insulating material, and a build-up structure disposed on the insulating material and including a second insulating body and a build-up wiring layer. A material of the first insulating body has a coefficient of thermal expansion (CTE) less than a CTE of the second insulating body, and the insulating material has a CTE less than a CTE of a material of the second insulating body.

Substrate having electronic component embedded therein

A dielectric powder includes a core-shell structure including a core region formed in an inner portion thereof and a shell region covering the core region. The core region includes barium titanate (BaTiO) doped with a metal oxide, and the shell region is formed of a ferroelectric material.

Dielectric powder and multilayer capacitor using the same

A substrate with an electronic component embedded therein includes: a core structure having a cavity; a metal layer disposed on a bottom surface of the cavity of the core structure; and an electronic component disposed on the metal layer in the cavity of the core structure. The substrate with the electronic component embedded therein has an excellent heat dissipation effect.

Substrate with electronic component embedded therein

A substrate having an electronic component embedded therein includes a core structure including a first insulating body and a plurality of core wiring layers disposed on or in the first insulating body, and having a cavity penetrating at least a portion of the first insulating body in a thickness direction of the substrate and including a stopper layer as a bottom surface of the cavity, and an electronic component disposed in the cavity and attached to the stopper layer, and a surface of the stopper layer connected to the electronic component has a composite including at least two among a metal material, an inorganic particle, a filler, and an insulating resin.

A substrate having an electronic component embedded therein includes a core structure including a first insulating body and first wiring layers and having a cavity, an electronic component embedded in the cavity, a build-up structure including a second insulating body, covering at least a portion of each of the core structure and the electronic component and filling a portion of the cavity, and second wiring layers, a first passivation layer disposed on a side of the core structure opposing a side of the core structure on which the build-up structure is disposed, and a second passivation layer disposed on a side of the build-up structure opposing a side of the build-up structure on which the core structure is disposed, wherein the first and second passivation layers include different types of materials.

A semiconductor package includes: a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the semiconductor chip; and a connection member including a first insulating layer disposed on the active surface of the semiconductor chip, a first redistribution layer disposed on the first insulating layer, first vias penetrating through the first insulating layer and electrically connecting the connection pads and the first redistribution layer to each other, and a first insulating film covering the first insulating layer and the first redistribution layer. The first insulating film includes a silicon based compound.

Fan-out semiconductor package

Growing community of inventors

Suwon-si, South Korea

Chang Hwa Park