Samsung Electronics Co., Ltd.

Chang-Hoon Han

Jae-Hong Park

Bo-Seong Kim

Han-Hong Lee

Yun-Jin Oh

Jung-Hyun Woo

Jinho Kim

Jin-Ho Kim

Kyung-Man Kim

Hyoung-Suk Kim

Sun-Mo Yang

Kwang-Ryul Lee

Sung-Woo Joo

Case for SSD (solid state drive)

A solid state drive (SSD) housing assembly includes an SSD housing and an extension frame. The SSD housing includes a first extension joint and a first mounting joint. The first mounting joint is a mechanism by which the housing can be mounted to an external device. The SSD housing has the form of a rectangular case in which an SSD module is held. The extension frame includes a second extension joint and a second mounting joint. The second mounting joint is a mechanism by which the frame can be mounted to the external device. The extension frame is attachable to and detachable from the SSD housing by virtue of the first extension joint and the second extension joint.

Solid state drive (SSD) housing and SSD housing assembly

An optical connector for directly transferring data is disclosed. The optical connector includes a first input device connected to a first data source and to which a first input signal is applied, a first light emitting device connected to the first input device and generating a first optical signal corresponding to the first input signal, a first light receiving device positioned close to the first light emitting device in such a configuration that the first optical signal directly reaches the first light receiving device from the first light emitting device, the first light receiving device generating a first output signal corresponding to the first optical signal, and a first output device connected to the first light receiving device and to a second data source to which the first output signal is transferred. Large-sized data may be transferred at high speed and high reliability without light transfer units.

Optical connector and stack module including the same

A semiconductor package includes a first semiconductor chip mounted to a substrate, a first encapsulant covering the first semiconductor chip and have first to fourth sidewall surfaces, and a chip stack mounted to the substrate and disposed on the first encapsulant. The chip stack includes a plurality of second semiconductor chips. A second encapsulant covers the chip stack. The second encapsulant may cover the first sidewall surface of the first encapsulant and expose the third sidewall surface of the first encapsulant.

Semiconductor package having plural semiconductor chips and method of forming the same

Provided is a semiconductor package including a first package and a second package. The first package includes a first substrate having a first front side and a first back side opposing the first front side. The first package further includes a first semiconductor chip on the first front side and an external connection member on the first semiconductor chip. The external connection member may be configured to electrically connect the first semiconductor chip to an external device. The second package includes a second substrate having a second back side facing the first back side of the first substrate and a second front surface opposing the second back side. The second package includes a second semiconductor chip on the second front side. The semiconductor package further includes an internal connection member between the first back side and the second back side to electrically connect the first package to the second package.

Semiconductor package

A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.

Printed circuit board and semiconductor package including the same

A semiconductor card package and a method of manufacturing the semiconductor cared package are provided. The package may include a housing having a cavity. The cavity may have a size corresponding to at least one standard semiconductor package. External terminals may be exposed on the outside of the housing. Internal terminals may be disposed in the cavity. At least one internal semiconductor package may be inserted into the cavity. The internal semiconductor package includes I/O terminals. Each of the I/O terminals is connected to a corresponding one of the internal terminals.

Semiconductor card package and method of forming the same

Provided are a semiconductor package and a method of manufacturing the semiconductor package, and more particularly, a semiconductor package with bonding wires and a method of manufacturing the semiconductor package. The semiconductor package includes a substrate including a finger, at least one semiconductor chip stacked on the substrate, the semiconductor chip including a chip pad, and a wire which electrically connects the finger with the chip pad, wherein one end of the wire bonds with an upper surface and lateral surfaces of the finger.

Growing community of inventors

Cheonan-si, South Korea

Chang-Hoon Han