Magnachip Semiconductor, Inc.

Chang-Hee Shin

Ki-Seok Cho

Seong-Do Jeon

Kwon-Young Oh

Youn-Jang Kim

Si-Hyung Cho

Seon-Do Jeon

Kim Youn-Jang

Disclosed are a unit cell capable of improving a reliability by enhancing a data sensing margin in a read operation, and a nonvolatile memory device with the same. The unit cell of a nonvolatile memory device includes: an antifuse having a first terminal between an input terminal and an output terminal; and a first switching unit coupled between a second terminal of the antifuse and a ground voltage terminal.

Antifuse unit cell of nonvolatile memory device for enhancing data sense margin and nonvolatile memory device with the same

A display driver IC with a built-in memory device having a one-time programmable function is provided. The memory device includes: a cell array comprising a plurality of one-time programmable unit cells and configured to receive a writing voltage generated from an internal voltage generating unit to operate upon writing operation; a detecting unit configured to detect a change of the writing voltage; and a controlling unit configured to control the internal voltage generating unit and the unit cells according to an output signal of the detecting unit.

Memory device with one-time programmable function, and display driver IC and display device with the same

There is provided an anti-fuse, including a gate dielectric layer formed over a substrate, a gate electrode, including a body portion and one or more protruding portions extending from the body portion, the body portion and the one or more protruding portions being formed to contact on the gate dielectric layer, and a junction region formed in a portion of the substrate exposed by sidewalls of the one or more protruding portions.

Anti-fuse and method for forming the same, unit cell of non volatile memory device with the same

A nonvolatile memory device including one-time programmable (OTP) unit cell is provided. The nonvolatile memory device includes: a unit cell; a detecting unit configured to detect data from the unit cell; and a read voltage varying unit configured to vary an input voltage and supply a varied read voltage to the unit cell.

Nonvolatile memory device

A One-Time Programmable (OTP) unit cell and a nonvolatile memory device having the same are disclosed. A unit cell of a nonvolatile memory device includes: an anti-fuse connected between an output terminal and a ground voltage terminal; a first switching unit connected to the output terminal to transfer a write voltage to the output terminal; and a second switching unit connected to the output terminal to transfer a read voltage to the output terminal.

Unit cell of nonvolatile memory device and nonvolatile memory device having the same

Disclosed is a method for programming a nonvolatile memory device including one time programmable unit cells. The method for programming a nonvolatile memory device including one time programmable (OTP) unit cells, the method comprising applying a pulse type program voltage having a plurality of cycles. The present invention relates to a method for programming a nonvolatile memory device, which can prevent malfunctions by enhancing a data sensing margin in a read operation through the normal dielectric breakdown of an antifuse during a program operation, and thus improve the reliability in the read operation of an OTP unit cell.

Method for programming nonvolatile memory device

An anti-fuse includes a gate dielectric layer formed over a substrate, a gate electrode including a body portion and a plurality of protruding portions extending from the body portion, wherein the body portion and the protruding portions are formed to contact on the gate dielectric layer, and a junction region formed in a portion of the substrate exposed by sidewalls of the protruding portions.

Anti-fuse and method for forming the same, unit cell of nonvolatile memory device with the same

One-time programmable cell and memory device having the same includes a first metal oxide semiconductor (MOS) transistor configured to form a current path between a first node and a second node in response to a read-control signal, a second MOS transistor configured to form a current path between a third node and the second node in response to a write-control signal and an anti-fuse connected between the second node and a ground voltage terminal, wherein a voltage applied to the second node is output as an output signal.

One-time programmable cell and memory device having the same

A semiconductor memory device is capable of reading data at a high speed, without using a reference cell transistor. The semiconductor memory device includes a sensing unit including first cross-coupled MOS transistors to sense and amplify a voltage difference between a first node and a second node, and a unit cell including second cross-coupled cell MOS transistors to latch data and output a first signal and a second signal corresponding to the latched data to the first node and the second node, respectively.

Growing community of inventors

Chungcheongbuk-do, South Korea

Chang-Hee Shin