Daewoo Electronics Co., Ltd.

Other

Digital and Analog Co., Ltd.

Chang-Gyun Kim

Jae-Hoon Jeong

Bo-Hyung Cho

Goog-Chun Cho

Jong-Hu Park

Disclosed is a digital PWM input D class amplifier by PWM negative feedback. The amplifier includes: digital modulation part for modulating PCM signal of input audio to PWM signal; pulse width generating and correcting part for comparing difference between the PWM signal and output signal negatively fed back, with PWM ramp signal to generate PWM switching signal; output part for generating an amplified output audio signal in response to the PWM switching signal of the pulse width generating and correcting part; and voltage negative feedback loop for negatively feeding back signal of the output part and decreasing a harmonic component to provide the signal to the pulse width generating and correcting part. Thus, the invention compares the negative feedback signal with positive/negative (+/&#x2212;) saw tooth PWM ramp signal to control On/Off time period of switching transistor and the PWM pulse width and thereby enhance the linearity of the output PWM.

Digital PWM input D class amplifier by PWM negative feedback

An improved control device for use in an automatic video tape cassette changing apparatus is adaptive to various types of the video cassette recorders. The control device is capable of sequentially changing a plurality of cassettes in a convenient and reliable manner in a video cassette recorder. The control device include the sensors 52, 53, 54, 55, 56, the microprocessor 51 and the drive circuit for actuating the mechanical components. The microprocessor includes a first control mode responsive to the cassette detection signals from the sensor 54 and 56 for sequentially actuating the drive circuits 21, 36 and 39, and a second control mode responsive to the cassette detection signals from the sensors 53 and 56 for sequentially actuating the drive circuits 36, 39 and 41.

Automatic video-tape cassette changer for use with a video cassette

An apparatus for controlling the rotational speed of a motor. The apparatus comprises a subtracter for subtrating a speed error signal corresponding to a frequency signal generated from a frequency generator from a period deviation signal between the frequency signal and a predetermined reference frequency signal to produce a primarily compensated speed error signal; a first adder for adding the primarily compensated signal and the period deviation signal to produce an added signal; a delay circuit for delaying the output signal of the first adder, wherein the delay circuit comprises a first to an Nth delay cells, wherein each of the delay cells latches the output signal of the first adder entering the first delay cell and serially shifts the latched signal in each of the delay cells toward the Nth delay cell by one signal at a time whenever the output of the first adder is supplied to the delay circuit and wherein the output of the delay circuit is supplied to the subtracter and to the first adder; a summation circuit for summing up all of the signals being shifted from the respective delay cells to produce a sum period deviation signal; an averaging circuit for averaging the sum period deviation signal to produce an averaged deviation signal; and second adder for adding the primarily compensated signal and the averaged deviation signal to produce the motor speed control signal with a compensated period deviation. A method is also provided for controlling the speed of the motor.

Growing community of inventors

Seoul, South Korea

Chang-Gyun Kim