Samsung Electronics Co., Ltd.

Chang-gyu Hwang

Won-suk Yang

Young-Jae Choi

Won-Seong Lee

Dug-dong Kang

Joo-young Yoon

Min-uk Hwang

Ki-man Han

Integrated circuit memory devices are manufactured by forming spaced apart source and drain regions in an integrated circuit substrate, and an insulated gate on the integrated circuit substrate therebetween. An interlayer insulating layer is formed on the integrated circuit substrate, including first and second conductive pad contacts which extend therethrough and which electrically contact the source and the drain region, respectively. A trench is formed in the interlayer insulating layer, including in the second conductive pad contact. A first insulating layer is formed to line the trench, except for adjacent the second conductive pad contact. A buried bit line is formed in the trench, electrically contacting the second conductive pad contact through the first insulating layer. A second insulating layer is formed on the first insulating layer and on the buried bit line, except for adjacent the first conductive pad contact. A patterned storage electrode is formed on the second insulating layer, which electrically contacts the first conductive contact pad.

Methods for manufacturing integrated circuit memory devices including

A method for manufacturing first electrode of a capacitor of a semiconductor device is disclosed. After forming a polycrystalline layer composed of grains with microscopic structure to include an impurity in them, the polycrystalline layer is etched to cut the boundary portions of the grains, thereby allowing the surface of the polycrystalline layer to be rugged. The micro-trenches or micro-pillars are formed by using the oxide layer or an anisotropic etching after exposing the surface of the first rugged polycrystalline layer, and epitaxial grains are formed by epitaxial growth, so that cell capacitance can be further increased. The simple process allows the formation of a reliable semiconductor device having regularity and reproducibility, and capable of increasing and adjusting the cell capacitance easily.

Method for manufacturing a capacitor of a semiconductor device

An improved isolation method in a semiconductor device of selective polysilicon oxidation (SEPOX) which can create a field oxide layer having a size below the optical resolution and good isolation characteristics. A buffer layer comprised of polysilicon or amorphous silicon is formed on a semiconductor substrate, and then an anti-oxidative pattern with an opening which defines an isolation region exposing a portion of the buffer layer is formed. Then a portion of the exposed buffer layer is isotropically etched in order to form an undercut portion in the lower portion around the opening. Then an anti-oxidative spacer filling the undercut portion is formed on the sidewall of the opening. Thereafter, a field oxide layer is formed by partially oxidizing the portion of the buffer layer exposed by the opening and the semiconductor substrate exposed in the opening. The size of bird's beak is decreased, thereby forming a field oxide layer with good isolation characteristics and small size.

Isolation method for semiconductor device

Growing community of inventors

Seoul, South Korea

Chang-gyu Hwang