Samsung Electronics Co., Ltd.

Chang-Cheol Lee

Dong-Kuk Kim

Jae-young Hong

Min-Ill Kim

Tae-Hoe Hwang

In-Young Lee

Ki-Kwon Jeong

Hyun-Jun Kim

Sang-Yeop Lee

Min-Il Kim

A semiconductor package comprises a substrate having a first opening formed therethrough, a first semiconductor chip stacked on the substrate in a flip chip manner and having a second opening formed therethrough, a second semiconductor chip stacked on the first semiconductor chip in a flip chip manner and having a third opening formed therethrough, and a molding material covering the first semiconductor chip and the second semiconductor chip and filling up a space between the substrate and the first semiconductor chip, a space between the first semiconductor chip and the second semiconductor chip, and filling each of the first opening, the second opening, and the third opening.

Semiconductor package including semiconductor chip with through opening

The present invention relates to an apparatus for stacking semiconductor chips, a method for manufacturing a semiconductor package using the same and a semiconductor package manufactured thereby. The apparatus for stacking semiconductor chips may comprise two tables for supporting wafers, a picker for picking up semiconductor chips and a picker transfer unit for moving the picker vertically and horizontally. The method for manufacturing a semiconductor package using the same may allow easy and rapid stacking of semiconductor chips, thereby improving the productivity of semiconductor package manufacture. Further, a semiconductor chip having a relatively thick film is attached onto another semiconductor chip having a relatively thin film. The thicker semiconductor chip may protect the thinner semiconductor chip from faults such as chipping or warpage which may occur due to external shocks such as that caused by a picker, thereby improving the reliability of the package.

Apparatus for stacking semiconductor chips, method for manufacturing semiconductor package using the same and semiconductor package manufactured thereby

A multi-chip package comprises a package substrate having bond fingers disposed thereon. A first chip have center bonding pads formed on a substantially center portion thereof. The first chip is disposed on the package substrate. Insulating support structures are formed on the first chip located outward of the bonding pads. A bonding wire is connected between one of the bond fingers and at least one of the center bonding pads. A second chip has is disposed over the bonding wire and overlying the insulating support structures.

Semiconductor multi-chip package and fabrication method

In an embodiment of the invention an apparatus is configured to stack a plurality of semiconductor chips having the same or similar size. The apparatus includes a tape providing unit for providing an insulating adhesive tape, a tape attaching device for attaching the insulating adhesive tape to an area between electrode pads of a first chip, and a chip attaching device for attaching a second chip to the insulating adhesive tape.

Growing community of inventors

Chungcheongnam-do, South Korea

Chang-Cheol Lee