Advanced Micro Devices Corporation

Globalfoundries Inc.

Chandrakant Pandya

Mark D Nicol

Sanjiv K Lakhanpal

Jennifer B Pencis

Trent Johnson

Heather Lynn Hanson

Arthur M Ryan

Michael L Choate

Steven R Klassen

John Heon Yi

Richard Alan Hamersley

Michael J Borsch

Satwant Singh

Hooi-Min Lim

Jeff Brinkley

Glenn Eubank

Michael Gregory Tarin

A system and method for testing a processor. The system includes a gold processor and a test processor, wherein the test processor is the device under test (DUT). The test processor and the gold processor are identical. A first memory is coupled to the gold processor by a first memory bus and a second memory, independent of the first, is coupled to the test processor by a second memory bus. The first and second memories are identical. A memory bus comparator coupled to the first and second memory buses compares memory bus signals generated by the gold and test processors, and selectively provide a first indication if a mismatch occurs. A peripheral bus comparator is also coupled to the gold and test processors, and compares downstream transactions generated by the gold and test processors and to provide a second indication if a peripheral bus comparison results in a mismatch.

Processor test system utilizing functional redundancy

Apparatus and methods for remotely configuring a computer BIOS of a testing computer system are provided. In one aspect, a method of testing is provided that includes establishing an interface between a first computer system and a second computer system. The second computer system includes a computer readable storage device that has a BIOS and a first set of BIOS configuration settings. The first set of BIOS configuration settings is adapted to a first device under test. At least one instruction is sent from the first computer system to the second computer system to enable the second computer system to select a second set of BIOS configuration settings adapted to a second device under test having different electronic characteristics than the first device under test. An electrical test is performed on the second device under test using the second computer system and the second set of BIOS configuration settings.

Method and apparatus for remote BIOS configuration control

A burn-in test system. A burn-in test system includes a device under test (DUT), a temperature controller coupled to the DUT, and a test controller. During testing, the test controller: (a) sets a parameter of the DUT to a first value and applies a test stimulus to the DUT, and (b) sets the parameter of the DUT to a second value and applies the test stimulus to the DUT. A change in the value of the parameter results in a change in the amount of heat dissipated by the DUT. The temperature controller maintains the DUT at a pre-determined temperature during testing with the parameter set to both the first and the second values. The DUT may be further coupled to a module that comprises circuitry employed in a product-level application environment. The module is configured by the test controller to simulate a product-level application.

Burn-in using system-level test hardware

A plurality of command segments comprising one command are received into an integrated circuit in a plurality of phases, each command segment being received in a different phase. The command segments are pushed into a command queue. Control logic checks for a cancellation indication for the command being received. If a cancellation indication is received, the control logic for the command queue performs an undo-push operation to remove the command segments stored in the command queue associated with the cancelled command.

FIFO with undo-push capability

A command filter selectively forwards received commands to a command queue for in-order execution. If the received command is a probe response command or if probe response information is extracted.from other commands, the probe response is stored in a storage location other than the command queue and executed out-of-order. Data movements specified by memory modifying commands already in the command queue and affecting the cache line in question are also performed out-of-order and the memory modifying command is discarded when it is removed in-order from the command queue.

Out-of-order probing in an in-order system

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Pflugerville, TX, United States of America

Chandrakant Pandya