Agilent Technologies, Inc.

Chancellor Archie

Laura Elisabeth Simmons

An application specific integrated circuit (ASIC) architecture for memory access. A first functional block provides a first address, a first column address strobe signal, and a first read/write signal associated with a first memory access. A second functional block provides a second address, a second column address strobe signal, and a second read/write signal associated with a second memory access. The ASIC architecture includes an embedded memory interface that is coupled to the first functional block and the second functional block. The embedded memory interface provides the first functional block and the second functional block access to an embedded memory either at the same time (referred to herein as concurrent access or simultaneous access) or at different times (referred to herein as consecutive or non-concurrent access). When predetermined conditions are met, the embedded memory interface provides the first functional block and the second functional block concurrent access to the embedded memory. When the predetermined conditions are not met, the embedded memory interface provides consecutive access to the embedded memory.

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Portland, OR, United States of America

Chancellor Archie