Samsung Electronics Co., Ltd.

Chan-Won Kim

Ji-Young Kim

Seung-Jun Lee

Sung-eui Kim

Jong-Bom Seo

Jung-Woo Seo

Hoon Jeong

Young-Seung Cho

Jun-soo Lee

Junho Yoon

Je-Woo Han

Kyoung-Ryul Yoon

Seong-Kyu Yun

Minjoon Park

Kee-Hong Lee

Methods of forming a semiconductor device can be provided by forming a first molding layer on a substrate and forming a first hole through the first molding layer. A second molding layer can be formed on the first molding layer so that the first hole is retained in the first molding layer and a second hole can be formed through the second molding layer to connect with the first hole. A capacitor electrode can be formed in the first and second holes.

Methods of forming semiconductor device including capacitors with modified sidewalls and related devices

A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.

Semiconductor devices including capacitors and methods of manufacturing the same

Semiconductor devices including capacitors

Methods of forming a hard mask capable of implementing an electrode having a high aspect ratio are provided. A molding layer may be formed on a substrate. A sacrificial layer may be formed on the molding layer. First mask patterns may be formed in parallel in the sacrificial layer. After the first mask patterns are formed, second mask patterns, which cross the first mask patterns and are in parallel, may be formed in the sacrificial layer. The first mask patterns and the second mask patterns may have materials more opaque than the sacrificial layer. Upper surfaces of the sacrificial layer, the first mask patterns and the second mask patterns may be exposed at the same horizontal level. The sacrificial layer may be removed. Openings, which pass through the molding layer, may be formed using the first mask patterns and the second mask patterns as etch masks. Electrodes may be formed in the openings.

Methods of manufacturing semiconductor devices having high aspect ratio

A method of fabricating a semiconductor device is provided. The method may include forming an interlayer insulating layer on a structure with a cell region and a peripheral circuit region, forming a first mask layer on the interlayer insulating layer, forming trenches in the first mask layer exposing the interlayer insulating layer by patterning the first mask layer on the peripheral circuit region, and forming key mask patterns in the trenches. An etch selectivity of the first mask patterns with respect to the interlayer insulating layer may be greater than that of the key mask patterns with respect to the interlayer insulating layer.

Method of fabricating semiconductor devices

Growing community of inventors

Seoul, South Korea

Chan-Won Kim