Samsung Electronics Co., Ltd.

Yonsei University

Industry-university Cooperation Foundation Sogang University

Industry-university Cooperation Foundation

Chan Min Park

Won Jong Lee

Kyoung June Min

Seok Yoon Jung

Tack Don Han

Jeong Soo Park

Sung Jin Son

Jae Ho Nah

In Sung Ihm

Jin Woo Kim

Dong-Ho Lee

Shi Hwa Lee

Chang Soo Lee

Dong-Hoon Yoo

Cheol Jin Kim

Sang Oak Woo

Han Seong Kang

Kwon Taek Kwon

In Cheol Nam

Guen Yong Park

Eun Oh Kim

Jae Hyoun Kim

Dae Sun Kim

Bong Jun Jin

Duk Hyun Cha

Jin Hae Cho

Yun Hye Jung

Jin Seok Jeong

A semiconductor memory apparatus includes a memory cell unit and an internal voltage stabilization apparatus. The memory cell unit includes a row decoder, a column decoder, and a memory cell array. The internal voltage stabilization apparatus includes an operation termination determination unit configured to determine whether an operation of the semiconductor memory apparatus is terminated on the basis of an external input voltage and output an operation termination command, a termination voltage generation unit configured to generate a termination voltage having a preset voltage value on the basis of a determination result of operation termination by the operation termination determination unit, and a switch unit. The switch unit includes a plurality of switches that are turned in response to the operation termination command, and supplies the termination voltage, input from the termination voltage generation unit, to a plurality of internal nodes of the memory cell array.

Semiconductor memory apparatus and method of driving the same

A steam cooking apparatus with improved water supply and drainage structures. The apparatus includes a body, a cooking compartment, a steam generator to supply steam into the cooking compartment, a water vessel to store water and supply the water into the steam generator, a water supply device including a holder and a slider slidably mounted in the holder so as to be withdrawn from the body, a first water supply tube connecting the slider and the water vessel, a second water supply tube connecting the water vessel and the steam generator, and a drain tube to drain water in the steam generator to the outside of the body. The drain tube includes an end fixed to the slider so that the end of the drain tube is withdrawn with the slider from the body when water in the steam generator is drained to the outside.

Steam cooking apparatus

An image processing apparatus is provided. A splitting unit of the image processing apparatus may split a first space within an input three-dimensional (3D) model into a plurality of subspaces in order to generate an acceleration structure of the input 3D model. A decision unit of the image processing apparatus may set a subspace determined as having a relatively high probability of including a ray progress path among the plurality of subspaces, as a child node having a relatively high traversal priority in the acceleration structure among a plurality of child nodes.

Ray tracing apparatus and method

An image rendering apparatus may include a buffer memory unit and a processor. The buffer memory unit may store input ray data for image rendering according to a ray tracing scheme while shape data corresponding to the input ray data is being fetched from a cache. The processor may output the received shape data together with the input ray data to an operation apparatus.

Image rendering apparatus and method for preventing pipeline stall using a buffer memory unit and a processor

A semiconductor package includes a substrate having a vent hole extending through the substrate, a semiconductor chip mounted on an upper surface of the substrate, a plurality of solder ball pads formed on a lower surface of the substrate, and an encapsulant covering the upper surface of the substrate, the semiconductor chip, and an entirety of the lower surface of the substrate except for regions in which the solder ball pads are formed.

Semiconductor package including a substrate having a vent hole

A system and method of rendering three-dimensional (3D) graphics. The system for rendering 3D graphics may include a plurality of cores including a scratch pad memory, a first memory to perform a control flow, a second memory for loop acceleration, and a shared memory to interpolate with the plurality of cores.

System and method of rendering 3D graphics

A selector of an image processing apparatus may select, from a plurality of sub-pixels included in a first pixel, at least one sub-pixel to be anti-aliased. A processor of the image processing apparatus may calculate a color value of the first pixel by performing an anti-aliasing process with respect to each of the selected at least one sub-pixel.

Image processing apparatus and method

Provided is an image processing apparatus. The image processing apparatus may perform an intersection test for rendering of a ray tracing scheme. The image processing apparatus may include a first calculator and a second calculator. The first calculator may perform a ray-plane test to determine whether a ray intersects a plane including a primitive and a barycentric test to determine whether the ray intersects the primitive. The second calculator may calculate a hit point based on the ray which intersects the primitive.

Provided is an image processing apparatus. Ray tracing may be performed using a general scheme with respect to a plurality of reference pixels among pixels of an image to be rendered. With respect to a pixel excluding the reference pixels, geometry information may be interpolated based on a ray tracing result of adjacent reference pixels.

Image processing apparatus and method of rendering using a ray tracing scheme

A method and apparatus for processing a vertex may fetch pieces of position information of vertexes, may extract pieces of target position information from the fetched pieces of position information, may perform tile binning on the pieces of target position information, may fetch pieces of attribute information having same indexes as the pieces of target position information, and may shade the fetched pieces of attribute information.

Method and apparatus for processing vertex

A method to discard pixels early includes a first early depth test maintaining a depth value on a pixel to be discarded by a discard instruction, and a second early depth test updating the depth value on a pixel not to be discarded by the discard instruction. Because of the first and second early depth tests, a number of pixels to be processed by a pixel shading process may be reduced.

Apparatus and method of early pixel discarding in graphic processing unit

Provided are a data processing apparatus and a method of controlling the data processing apparatus. The data processing apparatus may select a single stream processor from a plurality of stream processors based on stream processor status information, and input data into the selected stream processor. The stream processor status information may include first status information of a processor core and second status information of at least one internal memory.

Data processing apparatus and method of controlling the data processing apparatus

A processor and a memory controlling method. The processor enables a Scratch-Pad Memory (SPM) to prepare data that a processor core intends to process, using a data management unit including a data cache, thereby increasing a data processing rate.

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Seoul, South Korea

Chan Min Park