Samsung Electronics Co., Ltd.

Chan-jong Park

Hyun-woo Lee

Ji-man Kim

Do-Jun Yang

Ki-Whan Song

Byung-chul Kim

Han-sung Lee

Sei-seung Yoon

Hyung-Dong Kim

Se-jin Jeong

Jun-ik Jang

Lei Zhang

Jae-il Jung

Soon-hyuk Hong

Ji-Man Kim

Tae-sung Jang

Jun-Ik Jang

Jae-Il Jung

Han-Sung Lee

Soon-Hyuk Hong

Disclosed is a data recognition model construction apparatus. The data recognition model construction apparatus includes a video inputter configured to receive a video, an image composition unit configured to, based on a common area included in each of a plurality of images that form at least a portion of the video, generate a composition image by overlaying at least a portion of the plurality of images, a learning data inputter configured to receive the generated composition image, a model learning unit configured to make a data recognition model learn using the generated composition image, and a model storage configured to store the learnt data recognition model.

Data recognition model construction apparatus and method for constructing data recognition model thereof, and data recognition apparatus and method for recognizing data thereof

Disclosed are an artificial intelligence (AI) system using a machine learning algorithm such as deep learning, and an application thereof. The present disclosure provides an electronic device comprising: an input unit for receiving content data; a memory for storing information on the content data; an audio output unit for outputting the content data; and a processor, which acquires a plurality of data keywords by analyzing the inputted content data, matches and stores time stamps, of the content data, respectively corresponding to the plurality of acquired keywords, based on a user command being inputted, searches for a data keyword corresponding to the inputted user command among the stored data keywords, and plays the content data based on the time stamp corresponding to the searched data keyword.

Electronic device and control method

An electronic apparatus and an operating method are provided. The electronic apparatus includes a storage, at least one sensor, and at least one processor configured to execute stored instructions to while the electronic apparatus is moving, capture a surrounding image by using the at least one sensor, when an unable-to-move situation occurs while the electronic apparatus is moving, generate context data including a surrounding image captured within a predetermined time from a time when the unable-to-move situation has occurred, store, in the storage, the generated context data corresponding to the unable-to-move situation having occurred, and learn the stored context data by using one or more data recognition models.

Electronic device and operation method therefor

The disclosure relates to an artificial intelligence (AI) system using a machine learning algorithm such as deep learning, and an application thereof. In particular, an electronic apparatus, a document displaying method thereof, and a non-transitory computer readable recording medium are provided. An electronic apparatus according to an embodiment of the disclosure includes a display unit displaying a document, a microphone receiving a user voice, and a processor configured to acquire at least one topic from contents included in a plurality of pages constituting the document, recognize a voice input through the microphone, match the recognized voice with one of the acquired at least one topic, and control the display unit to display a page including the matched topic.

Electronic apparatus, document displaying method thereof and non-transitory computer readable recording medium

An electronic device, a warning message providing method therefor, and a non-transitory computer-readable recording medium are provided. Disclosed is an artificial intelligence (AI) system using a machine learning algorithm such as deep learning and an application thereof. Disclosed, according to one embodiment, is an electronic device which can comprise: a position determination unit for determining a current position of the electronic device; a communication unit for receiving accident data and a driving situation; an output unit for outputting a warning message; and a processor for learning the received accident data to establish a plurality of accident prediction models, selecting an accident prediction model to be applied from among the plurality of accident prediction models based on the determined current position, determining possibility of accident occurrence by using the selected accident prediction model, and controlling the output unit such that the output unit provides a warning message based on determining that the possibility of accident occurrence is greater than or equal to a preset value.

Electronic device, warning message providing method therefor, and non-transitory computer-readable recording medium

Provided is an Artificial Intelligence (AI) system for simulating a human brain's functions, such as recognition, decision, etc., by using a machine learning algorithm such as deep learning, etc. and applications of the AI system. Provided is an electronic device including: a camera configured to capture an outside image of a vehicle, and a processor configured to execute one or more instructions stored in a memory, wherein the processor executes the one or more instructions to: determine, from the captured image, at least one object for estimating lane information; estimate, from the image, lane information of a road on which the vehicle is traveling, based on a distance between the determined at least one object and the vehicle and a vanishing point of the image; and output guide information for guiding driving of the vehicle based on the estimated lane information.

Method for estimating lane information, and electronic device

A current control circuit capable of minimizing changes in an output high voltage VOH and an output low voltage VOL and quickly and accurately bringing a divided voltage to a steady state, and a packet-type semiconductor memory device including the current control circuit. The current control circuit includes a first differential amplification type buffer for transmitting the voltage of a first pad, that is, the output high voltage VOH, without change in response to a current control enable signal, a second differential amplification type buffer for transmitting the voltage of a second pad, that is, the output low voltage VOL, without change in response to the current control enable signal, and a voltage divider for dividing a voltage ranging between the voltage outputs of the first and second differential amplification buffers, and outputting the divided voltage. Accordingly, in the packet-type semiconductor memory device including the current control circuit, the current control circuit minimizes changes in the output high voltage VOH and the output low voltage VOL and quickly and accurately brings a divided voltage to a steady state, so that the current driving capability of an output driver for driving the second pad can be quickly controlled.

Integrated driver circuits having current control capability

A semiconductor integrated circuit includes a plurality of signal wires and an array of capacitor-based memory cells. The capacitors of the memory cells are electrically coupled to a common voltage source node where a voltage source provides supply power to the array. Shield wires positioned proximal to the signal wires are electrically coupled to the common voltage source node. A shield capacitor may be provided between the signal wires and the common voltage source node to provide further noise suppression.

Semiconductor integrated circuit having shield wire

There is disclosed a parallel test circuit for a semiconductor memory device having a memory army with a plurality of memory cells and a plurality of comparators used for high-speed memory cell test, including a plurality of fist comparators performing first comparison with respect to data transmitted through a plurality of data output lines formed near memory blocks of the memory array; a plurality of second comparators coupled in common with each output terminal of the first comparators and performing second comparison with respect to output data of the first comparators; a multiplexer multiplexing output of the second comparator; first and second switches alternatively connected to an output terminal of the multiplexer; and a data output buffer coupled in common with output terminals of the first and second switches and buffering outputs of the first and second switches. The multiplexer is connected to the first switches for a first mode operation, and is connected to the second switch for a second mode operation to thereby perform a two-way data test.

Parallel test circuit for semiconductor memory device

A method for detecting an overvoltage signal applied to a semiconductor memory device address pin reduces stress on the device and simplifies the testing process by dividing the voltage of the overvoltage signal and comparing it to a reference voltage, thereby generating a difference signal. The difference signal is buffered by a drive stage which generates a test mode output signal that places the memory device in a test mode. An overvoltage detection circuit for implementing this method includes a comparison signal generator having a resistive voltage divider for dividing the overvoltage signal and generating a comparison signal. A differential amplifier compares the comparison signal to a reference signal from a reference signal generator. The differential amplifier generates a difference signal which is coupled to a drive stage which generates a test mode output signal. The comparison signal generator, the differential amplifier, and the drive stage can be enabled in response to a test mode enable signal.

Overvoltage detection circuit for generating a digital signal for a

A fast data transmission circuit for a semiconductor memory minimizes voltage variations of a data transmission line without the use of a separate data transmission voltage. The data transmission circuit includes a pair of input nodes, a data transmission line pair, a pair of sensing nodes, a pair of output nodes, and a control electrode. Prior to data transmission, the output nodes are pulled up to a high voltage state, the data transmission line pair is pulled down to a low voltage state, and the sensing nodes are held between the high and low voltage states. When the control pulse is applied to the control electrode, the sensing node voltage levels are transferred to the data transmission line pair by the sensing voltage transfer circuit. When one input node is pulled to a low voltage state, a corresponding one voltage level on one transmission line is changed, causing a corresponding change of voltage at one of the sensing nodes. The voltage difference at the sensing nodes causes a corresponding one of the output nodes to go to a low voltage state while the other output node remains at the high voltage state.

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Seoul, South Korea

Chan-jong Park