Vanguard International Semiconductor Corporation

Chan-Jen Kuo

Fu-Liang Yang

Chih-Cherng Liao

Jiunn-Liang Yu

Chi-San Wu

Yun-Chi Jiang

A method for preventing void formation in a gate of a transistor formed in a substrate is disclosed. The method comprises: forming a gate oxide layer on the substrate; forming a polysilicon layer on the gate oxide layer; performing an ion implantation on the polysilicon layer, the ion implantation performed with a power approximately 30 KeV and a dosage about more than 10,atoms/cm,; and forming a silicide layer on the polysilicon layer.

Method for forming a polysilicon layer in a polycide process flow

A planarzation process is crucial for submicron VLSI or ULSI fabrication, The method of the present invention comprises forming a stacked capacitor contact on a substrate, forming a first dielectric layer on the capacitor contact. Next an etching process is performed to etchback the first dielectric layer. Finally, a second dielectric layer is formed on the first dielectric layer. A thermal reflowing may be also used to increase the planarization.

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Tainan, Taiwan

Chan-Jen Kuo