Samsung Electronics Co., Ltd.

Chan-ik Park

Hyun-Jin Choi

Myung-hyun Jo

Jeong-Woo Lee

Ji-Hwan Kim

Yang-sup Lee

Hyun-Sung Shin

Sung-Joo Yoo

Prakash Talawar

Sang-Hoan Chang

Taek-Soo Kim

Sang Jin Oh

Jeong-ha Cheon

Provided are a controller configured to perform secure deletion, a key-value storage device including the controller, and a method of operating the key-value storage device. The key-value storage device includes a non-volatile memory including a plurality of blocks, and a controller configured to control a memory operation on the non-volatile memory, receive a write command including a first key and a first value corresponding to the first key from a host, write data of a file corresponding to the first value to at least one block of the plurality of blocks of the non-volatile memory in response to the write command, receive a secure deletion command for the first value from the host, and erase the at least one block to which the first value is written, in response to the secure deletion command.

Controllers configured to perform secure deletion, key-value storage devices including said controllers, and methods of operation thereof

A nonvolatile memory device includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array through a plurality of bit lines; a calculation circuit configured to perform a calculation on information bits and weight bits based on a calculation window having a first size, the information bits and weight bits being included in a user data set, the memory cell array being configured to store the user data set, the calculation circuit being further configured to receive the user data set through the page buffer circuit; and a data input/output (I/O) circuit connected to the calculation circuit, wherein the calculation circuit is further configured to provide an output data set to the data I/O circuit in response to the calculation circuit completing the calculation with respect to all of the information bits and the weight bits, and wherein the output data set corresponds to a result of the completed calculation.

Nonvolatile memory devices, memory systems and methods of operating nonvolatile memory devices for processing user data

A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command. A system for manipulating data includes a host and a flash translation layer. The host transmits a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The flash translation layer maps the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command.

Method and system for manipulating data

A method of controlling a non-volatile memory device includes comparing the number of banks that are in operating states with a threshold value. If the number of the banks is smaller than the threshold value, data stored in a standby bank is read. If there is no bank having data to be read, a standby bank is programmed. If the number of the banks is equal to or greater than the threshold value or if the reading or the programming is performed, it is determined whether there is a reading or programming command to be performed. If there is the reading or programming command to be performed, the process is repeated from the comparing step. The programming may include programming of a most significant bit (MSB) page or a least significant bit (LSB) page.

Method of controlling non-volatile memory device

Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.

Programming method for flash memory device

Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.

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Hwaseong-si, South Korea

Chan-ik Park