International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Challis Llewellyn Purrington

James Edward Hughes

Pravin S Patel

Thomas Dixon Pahel, Jr

Michael Leo Scollard

Henry Gaines McMillan

Jack P Wong

Christopher Collier West

Ivan R Zapata

Laura Ann Weaver

Milton Cobo

John M Mullen

Quy N Hoang

Andrew Keith Boggs

Joe Jacobs

Victor A Stankevich

Gary Roy Shippy

Tu T Dang

Brian A Baker

Maya P Yarbrough

William Gavin Holland

Dhruv Manmohandas Desai

Christopher Landon Wood

Alfredo Aldereguia

Scott Neil Dunham

Randolph Scot Kolvick

Warren D Bailey

Carl A Morrell

Sumanta Kumar Bahali

Michael Charles Elles

Nickolas John Gruendler

Paul Anthony Smith

Sean P Ryan

Robert F Kantner, Jr

Juan Q Hernandez

Brian E Bigelow

Nancy J Bolinger

Andre Byungyup Minn

Troy S Voytko

Richard P Southers

Dwayne A Lowe

Mark W Williams

Gwendolyn R Tobin

Christopher C Moody

Terry L Sawyers

Franklin Gerald Darroch

Dennis F Cole

Paul Douglas Bashor

Controlling electromagnetic ('EM') radiation in a data center having a number EM sections, including: receiving, by an EM controller, a specification of preferred EM radiation characteristics for the data center; and setting, by the EM controller, a state of each EM section in accordance with the specification, where the state of each EM section may be one of: an absorption state in which the EM section absorbs EM radiation or a reflection state in which the EM section reflects EM radiation.

Controlling electromagnetic radiation in a data center

Methods, apparatus, and product are disclosed for expanding functionality of hard drive bays in a computing system that include: providing, by a connector in a hard drive bay, access to two or more data communication busses of different type; receiving, by the connector of the hard drive bay, a device mounted within the hard drive bay; and communicately coupling, by the connector of the hard drive bay, the device to one of the data communication busses.

Expanding functionality of one or more hard drive bays in a computing system

One embodiment provides an error detection method wherein single-bit errors in a memory module are detected and identified as being a random error or a repeat error. Each identified random error and each identified repeat error occurring in a time interval is counted. An alert is generated in response to a number of identified random errors reaching a random-error threshold or a number of identified repeat errors reaching a repeat-error threshold during the predefined interval. The repeat-error threshold is set lower than the random-error threshold. A hashing process may be applied to the memory address of each detected error to map the location of the error in the memory system to a corresponding location in an electronic table.

Use of hashing function to distinguish random and repeat errors in a memory system

Methods, systems, and products are disclosed for enabling memory module slots in a computing system after a repair action, the computing system having a plurality of memory module slots and having at least one memory module installed in one of the memory module slots, that includes: determining, during a boot process for the computing system, whether any of the memory module slots are disabled; and if any of the memory module slots are disabled: retrieving, for each memory module installed in one of the memory module slots, a memory module identifier for that memory module, retrieving, from non-volatile memory of the computing system, previously stored memory module identifiers, determining whether the retrieved memory module identifiers match the previously stored memory module identifiers, and enabling the disabled memory module slots if the retrieved memory module identifiers do not match the previously stored memory module identifiers.

Enabling memory module slots in a computing system after a repair action

Embodiments of the invention address deficiencies of the art in respect to digital signal transmissions and provide a novel and non-obvious fall time accelerator circuit for use in a USB interface. In one embodiment of the invention, the USB interface can include a USB port driver coupled to a host controller driver over a USB bus. The USB interface also can include a fall time accelerator circuit coupled to the USB bus between the USB port driver and the host controller driver. The fall time accelerator circuit can include a pulse signal generator coupled to an inbound signal path from the USB bus and arranged to generate a tunable pulse upon detecting a falling edge of a digital signal on the inbound signal path. The circuit further can include an active timer additionally coupled to the inbound signal path to hold the tunable pulse for a set period of time. Finally, the circuit can include a falling drive signal strengthener coupled to an outbound signal path from the pulse signal generator arranged to release the tunable pulse on the outbound signal path onto the USB bus.

Fall time accelerator circuit

Methods, apparatus, and products are disclosed for preemptive thermal management for a computing system based on cache performance, the computing system having a processor, cached computer memory operatively coupled to the processor, and a processor cache operatively coupled to the processor, the processor cache capable of storing a subset of memory contents of the cached computer memory, that include: attempting, by the processor, to retrieve portions of the memory contents of the cached computer memory from the processor cache, resulting in cache misses for the processor cache; tracking, by the processor, cache miss statistics for the processor cache in the computing system, the cache miss statistics describing the cache misses for the processor cache; and administering a thermal management device for the computing system in dependence upon the cache miss statistics, the thermal management device operatively coupled to the processor and capable of managing temperature for the computing system.

Preemptive thermal management for a computing system based on cache performance

The present invention is directed to the detection of faulty CPU heat sink coupling during system power-up. A method in accordance with an embodiment of the present invention includes: monitoring a slope of a CPU temperature rise from initial system power-up; determining if the slope of the CPU temperature rise exceeds an expected value; and in the case that the slope of the CPU temperature rise exceeds the expected value, indicating an existence of a possible fault (PFA) related to a heat sink coupled to the CPU.

Detecting faulty CPU heat sink coupling during system power-up

Flexible paddle cards for installation on a motherboard of a computing system are disclosed that are oriented parallel with the motherboard when installed in the computing system and include: a printed circuit board; and three card connectors that correspond to three motherboard connectors mounted on the motherboard, two of the card connectors mounted on a first rigid region of the printed circuit board, the remaining third card connector mounted on a second rigid region of the printed circuit board, and the first rigid region and the second rigid region separated by a flexible region of the printed circuit board, the flexible region having a width that allows the printed circuit board to flex when the card connectors mate with the motherboard connectors.

Flexible paddle card for installation on a motherboard of a computing system

Printed circuit boards for countering signal distortion are disclosed that include: a conductive pathway on a printed circuit board between a transmitter and a receiver, the conductive pathway comprised of traces and vias connected together for conductive transfer of a signal from the transmitter to the receiver; a parasitic element on the printed circuit board, the parasitic element having a parasitic effect that distorts the signal; and one or more passive elements mounted adjacent to the conductive pathway without connecting to the conductive pathway, the passive elements having a corrective effect to reduce the distortion from the parasitic effect on the signal.

Printed circuit boards for countering signal distortion

An embodiment of the present invention is directed to a memory module connector having a pivotable air baffle that controls airflow at the memory module connector. When the memory module connector is occupied by a memory module, the air baffle may rest on an upper edge of the memory module, substantially parallel to the system board and in general alignment with the airflow. When the memory module has been removed, the air baffle may be pivoted downward toward the connector base and into the airflow, to offset the reduction in airflow impedance caused by the removal of the memory module from the memory module connector.

DIMM connector and memory system with compensated airflow impedance

Power is allocated to blades based on an estimate of the actual power they are expected to use rather than their maximum-power draw-value. To protect against situations where the estimated actual-power draw-value is exceeded, a hardware comparator monitors the blade system load against a predetermined threshold value set by a management module (MM) based on user input. If this threshold value is exceeded, a throttle latch is triggered, based on a signal from a service processor monitoring the blade system load. The output of this latch directly engages throttling. The service processor also monitors the output of the latch and communicates information regarding the throttling to the MM for evaluation.

Throttle management for blade system

A method and system are disclosed to enable and control power reduction in a blade/chassis system. A 'maximum power reduction' attribute is stored in the VPD of the blade (or can otherwise be input to or retrieved or calculated by the management entity). The management module of the chassis in which the blades and power supplies are located uses this information to manage the power reduction of blades when the system is operating in an over-subscription mode and a power supply fails. If throttling is required, the system knows the amount of power reduction available for each blade and controls the throttling by spreading it out among the blades in the system so that, ideally, no blade will cease operation altogether.

Programmable throttling in blade/chassis power management

A simple, but intelligent watchdog circuit uses an up/down counter for its delay element. A watchdog event will occur if the counter is allowed to over flow or under flow its boundaries (in either direction). The system objective is to keep the counter within its boundaries by controlling the direction of the count. The count direction is simply a function of the Most Significant Bit (MSB) of the counter. Thus, the system must simply monitor the counters MSB and perform a little intelligent to determine the desired count direction.

Intelligent watchdog circuit

Growing community of inventors

Raleigh, NC, United States of America

Challis Llewellyn Purrington