Ati Technologies Inc.

Vixs Systems, Inc.

Chak Cheung Ho

Oleg Drapkin

Grigori Temkine

Paul D Ducharme

Lewis Leung

Kuldip Sahdra

Norman Vernon Douglas Stewart

Ray Chau

Hugh Hin-Poon Chow

Krzysztof Socha

Ho Ming Wan

Ngar Sze Chan

A content access device includes an interface module that receives a transport stream and outputs a processed transport stream. An input buffer buffers the received transport stream. A polling processor processes the transport stream based on the at least one key to generate the processed transport stream, wherein the polling processor operates to descramble individual packets of the transport stream in a plurality of polling slots of a polling loop. An output buffer buffers the processed transport stream for output by the interface module.

Content access device with polling processor and methods for use therewith

A spurious-free fractional-N frequency synthesizer circuit is disclosed. The synthesizer circuit includes a multi-phase network circuit operative to provide output signals that are at least a 1/(2n&plus;1)) fractional version of the input signal. The synthesizer circuit includes a phase lock loop (PLL) circuit, with the multi-phase network circuit being coupled to the negative feedback loop of the PLL. The multi-phase network circuit includes a smoothing circuit that removes any jitter present at the output of the PLL.

Spurious-free fractional-N frequency synthesizer with multi-phase network circuit

A low common mode impedance differential driver includes an independent current source, a switching module, a dependent current source, and a bias control circuit. The independent and dependent current sources are operably coupled to the switching module to provide first and second current paths through the switching module. The bias control circuit is operably coupled to the dependent current source and to the differential output produced by the switching module. The bias control circuit provides a control signal to the dependent current source that causes the common mode of the differential output to be maintained within a desired tolerance.

Low comment mode impedence differential driver and applications thereof

A method and apparatus for providing serial transmission of a parallel input is accomplished by a parallel input serial output transmitter that includes a shift register operably coupled to receive a parallel input and to provide data serially to a gating circuit. The gating circuit, based on the state of the data it receives, generates a drive signal which causes a switching circuit to route current from a first current source to a second current source over different paths to produce a serial output. A bias circuit is coupled to the switching circuit to bias the serial output to a desired level.

Method and apparatus for parallel in serial out transmission

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Markham, Canada

Chak Cheung Ho