Hynix Semiconductor Inc.

Chae-Kyu Jang

Ju-Young Seo

A semiconductor device and a power voltage supply circuit for a test operation of a semiconductor system including the semiconductor device. The semiconductor device receives first and second power supply voltages in a normal operation mode from an external device and receives the first power supply voltage in a test operation mode. The semiconductor device includes a voltage level setting unit configured to set a power connection node at a voltage between a voltage level of a first power supply voltage terminal and a voltage level of a ground voltage terminal according to an operation mode signal, and a voltage driving unit configured to drive a second power supply voltage terminal with the first power supply voltage in the test operation mode, wherein the driving power is controlled according to the voltage level of the power connection node.

Semiconductor device and semiconductor system including the same

A voltage supply circuit includes a voltage generator and a controller. The voltage generator is configured to pump an externally input voltage and store the pumped external voltage as a first voltage having a set voltage level, before power-up begins, or pump the external voltage, add the pumped voltage to the stored voltage, and output the added voltage as an operating voltage. The controller is configured to output a first control signal to drive the voltage generator or stop operation of the voltage generator, according to an operating state.

Voltage supply circuit and flash memory device including the same, and method of supplying operating voltage

A semiconductor memory device is provided. Especially, there is disclosed a technique capable of increasing a net die by employing a cell capacitor as a reservoir capacitor according to a set mode. The semiconductor memory device of the present invention uses the cell capacitor as the reservoir capacitor in a normal mode, and prevents each voltage from being applied to the cell capacitor in a burn-in test mode. The voltage applied to the cell capacitor or MOS transistor can be adjusted according to the set mode.

Semiconductor memory device for controlling reservoir capacitor

A semiconductor memory over-driving scheme for a semiconductor memory device makes it possible to secure a high-speed sensing operation of a memory sense amplifier, regardless of a change of a power supply voltage. Over-driving efficiency is improved by controlling the discharging time and the drivability using different sized the drivers when the power supply voltage fluctuates while the bit line over-driving operation is performed.

Over-driving circuit in semiconductor memory device

An over-driving circuit for a semiconductor memory device is capable of rapidly securing a sensing operation of a bit line sense amplifier regardless of a level change of a power supply voltage. Timings are adjusted for supplying an over-driving voltage and for discharging based on a level change of a power supply voltage if a level thereof is changed when a bit line over-driving operation is in progress, thereby preventing an efficiency reduction of the over-driving operation.

Over-driving circuit for semiconductor memory device

It is provided a semiconductor device with an ability to receive various test signals and check test results in spite of a limited number of pads. The semiconductor device includes a signal transferring unit for transferring a power signal input through a multipurpose pad into a core area or delivering a test signal between the multipurpose pad and the core area while operating in a test mode and a test mode controlling unit for controlling the signal transferring unit to transfer one of the power voltage and the test signal.

Semiconductor device with multipurpose pad

There is provided a power up circuit capable of outputting a power up signal delayed by a predetermined time. The power up circuit includes a voltage divider for dividing an external voltage, a delay controller for generating a control signal to control an output voltage of the voltage divider for a predetermined time by using the external voltage, and a signal generator for generating a power up signal delayed by a predetermined time by using the control signal.

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Kyoungki-do, South Korea

Chae-Kyu Jang