Bull Hn Information Systems, Inc.

Chad Farmer

David A Egolf

Bruce A Noyes

Stefan R Bohult

In an emulation of a multiprocessor Target computer system on a Host computer system, Host virtual memory addresses are mapped and utilized as Target virtual memory addresses. Target virtual memory control tables are setup accordingly. Each Target processor is mapped to a Host thread. When a page fault is detected by the Host operating system, it is checked to see if it belongs to the Target system, and if it does, the executing thread transfers its processor identity to a free thread, and then completes processing the page fault. Upon completion, it marks the processes that had been executing on that thread and processor as available for execution, then blocks until activated. Another thread, upon dispatching that process, wakes up the blocked thread and transfers its processor identity to that thread, which continues to execute the interrupted process.

Method and data processing system for emulating virtual memory utilizing threads

In an emulation of a multiprocessor Target computer system on a Host computer system, Host virtual memory addresses are mapped and utilized as Target virtual memory addresses. Target virtual memory control tables are setup accordingly. Virtual-to-real address translation of a Target system effective address to a Host system virtual addresses is performed by identifying a working space for the effective address, determining a working space base address for that working space, and then performing a linear translation multiplying the effective address by a constant and adding it to the working space base address to generate the host system virtual address.

Method and data processing system for emulating virtual memory working spaces

In an emulation of a multiprocessor Target computer system on a Host computer system, Host virtual memory addresses are mapped and utilized as Target virtual memory addresses. Target virtual memory control tables are setup accordingly. Virtual-to-real address translation of a Target system effective address to a Host system virtual addresses is performed by identifying a working space for the effective address, selecting a working space base address data structure entry utilizing the corresponding working space number, determining a working space base address from that selected working space base address data structure entry, and then performing a linear translation multiplying the effective address by a constant and adding it to the working space base address to generate the host system virtual address. A corresponding working space limit entry can be utilized to bounds check the addresses generated.

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Phoenix, AZ, United States of America

Chad Farmer