Technische Universiteit Delft

Cezar Rodolfo Wedig Reinbrecht

Said Hamdioui

Mottaqiallah Taouil

Fethulah Smailbegovic

Integrated circuit device having a processor module () in communication with a cache memory module (), and one or more memory control modules () each arranged to interface with an associated storage memory unit (). An authentication module () is provided in communication with the memory control modules () and the cache memory modules (). The authentication module () is arranged to generate and store a hardware based secure key, read a predetermined set of data from the associated storage memory units (), and an associated stored hash value, calculate a hash value of the predetermined set of data using the hardware based secure key; and store the predetermined set of data in the cache memory module () only if the calculated hash value corresponds to the associated stored hash value.

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Delft, Netherlands

Cezar Rodolfo Wedig Reinbrecht