Stmicroelectronics S.a.

Stmicroelectronics (Crolles 2) Sas

Stmicroelectronics (Grenoble 2) Sas

Stmicroelectronics Asia Pacific Pte Limited

Stmicroelectronics (Alps) Sas

Stmicroelectronics France

Céline Mas

Eric Benoit

Danika Chaussy

Olivier Le Briz

Olivier Scouarnec

Gilles Troussel

Philippe Maige

Lookah Chua

Corinne Ianigro

Wai Yin Hnin

Francois Agut

Matteo Maria Vignetti

Hervé Pierrot

Hongliang Zhang

The present description describes an image sensor including an array of pixels arranged inside and on top of a region of a semiconductor substrate electrically insulated from the rest of the substrate by insulating trenches crossing the substrate, each pixel including a photoconversion area and at least two assemblies, each including a memory area and a transfer gate coupling the memory area to the photoconversion area, and a circuit configured to apply, for each pixel and at least during each integration phase, a bias voltage different from ground to a portion of the substrate having the pixel arranged inside and on top of it.

Image sensor

In an embodiment, an image sensor includes: first and second voltage rails; first and second regulators configured to generate first and second regulated voltage at the first and second voltage rails, respectively; and a plurality of pixels coupled to the first and second voltage rails. Each pixel includes: first and second transistor coupled first and second storage capacitor, respectively. A third transistor is coupled between a control terminal of the first transistor and the first or second voltage rails. The third transistor is configured to limit a slew rate of current flowing between the control terminal of the second transistor and the first or second voltage rails to a first slew rate when the image sensor operates in global shutter mode, and to a second slew rate when the image sensor operates in rolling mode, the first slew rate being smaller than the second slew rate.

Slew rate control circuit for an image sensor

A device for controlling an electroluminescent matrix display by successive selection of its lines, including a column control circuit having circuitry capable of placing, at the beginning of the selection of a line, the display column at a precharge voltage based on the operating voltage of the previous line, the column control circuit also having circuitry capable of modifying the precharge voltage according to the difference between luminance instructions of the previous line and those of the selected line.

Control of an electroluminescent display

A circuit for controlling a matrix display formed of light-emitting diodes, capable of successively selecting lines of the screen and, for each line from a set of selected lines, of selecting columns, the voltage of each selected column settling at an operating voltage. The circuit is capable, before selection of each line from said set of lines, of precharging at least the columns to be selected to a precharge voltage. The circuit includes a device for adjusting the precharge voltage including a measurement circuit capable, on each selection of a line from said set of lines, of measuring the maximum operating voltage from among the operating voltages of the selected columns; a circuit capable of storing the maximum measured operating voltage; and a circuit capable of adjusting the precharge voltage based on the maximum stored operating voltage.

Automatic adaptation of the precharge voltage of an electroluminescent display

Circuitry for controlling a display matrix formed of light-emitting diodes arranged in rows and columns, diodes in each row being connected to common row lines, and diodes in each column being connected to common column lines, each of the column lines being selectively connected to a current source for providing a current to each of the column lines when the column line is selected, a column voltage being present at a column node of each column line while the column line is selected, each of the row lines being selectively connected to a rowoff voltage for turning off the diodes in that row, the circuitry including circuitry for generating the rowoff voltage including: capture circuitry arranged to capture a maximum value of the column voltages present at the column nodes of a plurality of selected column lines; storage circuitry arranged to store the maximum column voltage; and output circuitry arranged to provide the rowoff voltage based on the maximum column voltage.

Optimized rowoff voltage

A device for regulating the bias voltage of circuits for controlling columns of a matrix display capable of selecting columns to turn on the light-emitting diodes of the selected columns and of a selected line, the device including a first measurement circuit providing a first measurement signal representative of the highest voltage among the voltages of the selected columns; a second measurement circuit providing a second measurement signal representative of the lowest voltage among the voltages of the selected columns; and an adjustment circuit receiving the first and second measurement signals and capable of decreasing the bias voltage if the first measurement signal is smaller than a first comparison signal and of increasing the bias voltage if the second measurement signal is greater than a second comparison signal.

Automatic adaptation of the supply voltage of an electroluminescent display according to the desired luminance

A method for regulating the biasing voltage of column control circuits of an array screen formed of LEDs distributed in lines and columns, the column control circuits being adapted to turning on at least one LED of a line. The method includes increasing the biasing voltage when the current flowing through at least one activated LED is smaller than a determined luminance current and of decreasing the biasing voltage when the current flowing through each activated LED is equal to the determined luminance current.

Automated adaptation of the supply voltage of a light-emitting display according to the desired luminance

A method and circuit for displaying an image by activation of pixels of an array screen based on an image stored in digital form in memory point rows of a frame memory, having a stand-by mode that provides, at a frequency proportional to the display frequency, a cyclic succession of offset values; and for each row address of the frame memory, activating pixels of a screen line associated with said address offset by a same offset value based on the read states of the row associated with the address, and/or activating pixels of a screen line associated with the row address based on the read states of the frame memory row associated with the address offset by a same offset value.

Image display on an array screen

A method for displaying an image on an array screen by activation of screen pixels arranged in rows and columns, each pixel of a same row corresponding to a memory point of a same memory row, the memory point being set to an activation state when the corresponding pixel is to be activated, including the steps of identifying, among sets of the memory rows, the row sets for which at least one memory point of a row of the set is at the activation state; and successively selecting the only lines corresponding to the rows of the sets of rows identified for the pixel activation. The present invention also provides a device for displaying an image on an array screen.

Display of an image on an array screen by selective addressing of screen lines

The invention concerns a drive circuit for a plasma panel consisting of cells arranged at the intersections of lines and columns, comprising, for each column of the panel, a column drive unit () for selecting the column by applying a voltage window, the column having a different capacitance (C) depending on whether or not the neighboring columns are selected, each drive unit () comprising first elements (T, C, CS) for changing the capacitance in a first predetermined time interval during the low-to-high transition of the voltage window, and second elements (T) for discharging said capacitance in a second predetermined time interval during the high-to-low transition of the voltage window, the second elements being controlled on the basis of an estimation of the capacitance obtained from data (Qi&#x2212;, Qi+) indicating whether or not the neighboring columns of said columns have been selected.

Control circuit drive circuit for a plasma panel

A method for controlling cells of a plasma screen of array type, formed of cells arranged at the intersections of lines and columns, including the step of sequentially applying to each line an activation potential and, during the activation of a line, applying an activation potential to selected columns, in which, while a line is activated, the selected columns are non-simultaneously activated.

Growing community of inventors

Poisat, France

Céline Mas