Nxp B.v.

U.S. Philips Corporation

Cecilius Gerardus Kwakernaat

Stefan Gerhard Erich Butselaar

Cornelis Klaas Waardenburg

Jelle Nico Wolthek

Clemens Gerhardus Johannes De Haas

Hendrik Boezen

Lucas Pieter Lodewijk Van Dijk

Abraham Klaas Van Den Heuvel

Ruurd Anne Visser

Stefan Paul Van Den Hoek

Martinus Bredius

Cornelis Klass Waardenburg

Aloysius J Boomkamp

The embodiments described herein provide communication devices and methods that can facilitate communication between galvanically isolated systems. Specifically, the embodiments facilitate communication to a galvanically isolated system that is shut down without requiring that this shutdown system consume its own power while it is shutdown. To facilitate this, the communication devices and methods provide a wake-up device on the side of the shutdown system and facilitate the transfer of power across the galvanic isolation to the wake-up device when communication to the shutdown system is needed. With the wake-up device powered using power that was transferred across the galvanic isolation, the wake-up device can perform the actions needed to wake up the shutdown system, and can thus facilitate communication between the galvanically isolated systems. Thus, communication between galvanically isolated systems is facilitated without requiring that the shutdown system consume its own power during shutdown periods.

Communication devices and methods with power transfer over isolation for wake-up

The invention relates to a receiver for a differential data bus with two resistive branches (), with a differential amplifier with two transistors (), with a resistor (), and with a control logic () that controls a switch () with which a current from a current source () is switchable to either side of the resistor (), which resistor couples the two transistors (), and with two operational amplifiers () which are coupled to the two transistors () of the differential amplifier with opposite poles, in which receiver the control logic detects from the output signals of the two operational amplifiers () whether a '0' or a '1' is expected on the bus and which receiver sets the switch () accordingly so that a comparison with the received bus signal is made.

Apparatus for receiving differential signal using a differential amplifier

The invention relates to a receiver for a differential bus with a switch control logic (), with two branches with resistive elements (and) and with switches () for switching the resistive elements, in which the switch control logic sets the switches&#x2014;in a first routine for determining the absolute level of signals on the bus by applying a common mode voltage to the bus, by comparing the voltage on a first resistive branch with a reference voltage, by selecting the correct switch settings, and by writing these settings to an internal storage device,&#x2014;and in a second routine for minimizing the mismatch between the two resistive branches by applying a common mode voltage to the bus, by comparing the voltage of the second resistive branch with that of the already trimmed first resistive branch, by selecting the correct switch settings for the second branch, and by writing these settings to an internal storage device. The receiver therefore provides good balancing and common mode rejection.

Receiver for a differential data bus

A bus communication system contains a pair of communication conductors and a driver. The driver contains a plurality of pairs of controlled current source circuit, each pair comprising current source circuits of a first and second, mutually opposite polarity, and a control circuit for matching currents drawn by the current sources in each pair. The current source circuit of the first polarity have outputs coupled to a first one of the communication conductors, the current source circuits of the second polarity have outputs coupled to a second one of the communication conductors. A delay line is provided, with taps coupled to control inputs of the current sources of the first and second polarity, so that the pairs are switched on successively with mutual delays between successive pairs, as determined by the delay line.

Line driver with reduced interference

An integrated circuit has an input connection for connecting an external signal conductor that passes signals to execute functions in the device. The external signal conductor can pick up strong interfering signals with high frequency content, for example when the device is used in a car. To protect against unintended execution of functions the device contains a timer circuit comprising a capacitance and a current supplying circuit coupled to an integration node. A discharge diode is coupled between the input connection and the integration node, with a polarity such that the discharge diode, when in forward bias, is capable of draining current from the current supplying circuit. A detector is coupled to the integration node for generating a signal to be supplied to the integrated circuit device to respond to a signal transition on the conductor. The diode serves to reset integration on the integration node before the detector detects the transition in case of short pulses. By using a diode instead of a switching transistor the circuit is more robust against the effect of interfering pulses.

Transition detection at input of integrated circuit device

Bus driver having a P-channel output transistor (T1) for driving a first bus terminal (6) from a positive supply terminal (2), an N-channel output transistor (T2) for driving a second bus terminal (12) from a negative supply terminal (4), a P-channel driver transistor (T3) and an N-channel driver transistor (T4) series connected between the positive (2) and the negative (4) supply terminal. The control electrodes of the P-channel transistors (T1, T3) are interconnected and the control electrodes of the N-channel transistors (T2, T4) are interconnected to obtain a fixed relationship between the currents through the P-channel transistors (T1, T3) and through the N-channel transistors (T2, T4). The conduction of the driver transistors (T3, T4) is controlled by two floating control voltage sources (22, 24) which are connected between the interconnection node (20) of the driver transistors (T3, T4) and the respective control electrodes of the driver transistors. Any difference between the current through the P-channel driver transistor (T3) and the N-channel driver transistor (T4) is compensated for by a change in the voltage level at the interconnection node (20). In this way the currents through the driver transistors (T3, T4), and also through the output transistors (T1, T2) which are scaled copies of the driver transistors, are always equal and a highly symmetrical driving of the two bus wires (8, 14) is obtained. As a result, the electromagnetic radiation of the bus wires is low.

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Nijmegen, Netherlands

Cecilius Gerardus Kwakernaat