Texas Instruments Corporation

Catherine M Huber

Wayland B Holland

Debra J Dolby

Sarma S Gunturi

Michelle A Boyer

A method of fabricating a semiconductor device which includes providing a silicon substrate having a patterned mask thereover to expose a portion of the surface of the substrate. The exposed surface portion is oxidized to form a sacrificial silicon oxide region to a predetermined depth in the substrate at the exposed portions of the substrate. The sacrificial silicon oxide is then removed by a HF etch and a second region of silicon oxide is formed in the substrate in the region from which the sacrificial silicon oxide was removed. The step of removing the silicon oxide also includes removing a portion of the pad oxide. The sacrificial silicon oxide has a thickness less than the second region of silicon oxide which is from about 10 percent to about 30 percent of the thickness of the second region of silicon oxide. The oxidation steps are thermal oxidation steps in an oxygen-containing ambient.

Planarization of LOCOS through recessed reoxidation techniques

A semiconductor device and method of making same which includes a semiconductor substrate having a moat region with an ion implant in the moat region and a window in the substrate spaced from the moat region, electrically decoupled therefrom and having an ion implant therein in the form of a predetermined pattern. The moat region can contain one or more active and/or passive components therein. The method of fabrication comprises providing a semiconductor wafer, forming a moat region and an associated window region on the wafer, forming at least portions of electrical devices in the moat region by implanting ions therein, forming a predetermined non-electrical component pattern in the window by implanting ions in the window concurrently with the implanting of ions in the moat and completing fabrication of at least one electrical component in the moat region. Implants are verified by the above described device and selectively etching the window with an etchant selective to one of the substrate with ion implant therein and the substrate without ion implant therein to provide the pattern at a different level from the remainder of the window. The pattern is a non-electrical component pattern and the etchant is preferably selective to the portion of the window with ion implant to cause the pattern to lie below the portion of the window without ion implant.

Method of implant verification in semiconductor device using reticle

Semiconductor device with reticle specific implant verification indicator

Method of forming implant indicators for implant verification

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Allen, TX, United States of America

Catherine M Huber