Infineon Technologies Ag

Infineon Technologies Austria Ag

Infineon Technologies Dresden Gmbh & Co . Kg

Caspar Leendertz

Rudolf Elpelt

Michael Hell

Anton Mauder

Dethard Peters

Andreas Peter Meiser

Romain Esteve

Hans-Joachim Schulze

Matteo Dainese

Thomas Basler

Christian Philipp Sandow

Bernd Zippelius

Paul Ellinghaus

Shiqin Niu

Ralf Siemieniec

Johannes Georg Laven

Jens Peter Konrath

Wolfgang Bergner

Christian Jaeger

Alexander Philippou

Thomas Aichinger

Markus Bina

Markus Beninger-Bina

Roland Rupp

Erich Griebl

Moriz Jelinek

Ingo Dirnstorfer

Frank Dieter Pfirsch

Werner Schustereder

Florian Grasse

Konrad Schraml

Thomas Ganner

Francisco Javier Santos Rodriguez

Antonio Vellei

Daniel Kueck

Larissa Wehrhahn-Kilian

Alice Pei-Shan Leendertz

Andreas Huerner

Alice Pei-Shan Hsieh

Axel Koenig

Kristijan Luka Mletschnig

A semiconductor component includes: a SiC semiconductor body; a trench extending from a first surface of the SiC semiconductor body into the SiC semiconductor body, the trench having a conductive connection structure, a structure width at a bottom of the trench, and a dielectric layer covering sidewalls of the trench; a shielding region along the bottom and having a central section which has a lateral first width; and a contact formed between the conductive connection structure and the shielding region. The conductive connection structure is electrically connected to a source electrode. In at least one doping plane extending approximately parallel to the bottom, a dopant concentration in the central section deviates by not more than 10% from a maximum value of the dopant concentration in the shielding region in the doping plane. The first width is less than the structure width and is at least 30% of the structure width.

Semiconductor component having a SiC semiconductor body

A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.

Method of manufacturing silicon carbide semiconductor devices

A semiconductor device includes a transistor that has: a drift region of a first conductivity type in a semiconductor substrate having a first main surface; a body region of a second conductivity type between the drift region and the first main surface; a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas including a first mesa and a plurality of dummy mesas, the plurality of trenches including an active trench and a plurality of dummy trenches arranged in a row; a gate electrode arranged in the active trench; and a source region of the first conductivity type in the first mesa. The first mesa is arranged adjacent to the active trench. A dummy mesa is arranged between each adjacent pair of the dummy trenches. The dummy mesas do not carry load current during an on-state of the transistor.

Semiconductor device having a transistor with trenches and mesas

A silicon carbide device includes: a transistor cell having a stripe-shaped trench gate structure extending from a first surface into a silicon carbide body, the gate structure having a gate length along a lateral first direction, a bottom surface and a first gate sidewall of the gate structure being connected via a first bottom edge of the gate structure; at least one source region of a first conductivity type in contact with the first gate sidewall; and a shielding region of a second conductivity type in contact with the first bottom edge of the gate structure across at least 20% of the gate length. No source regions of the first conductivity type are in contact with a second gate sidewall of the gate structure.

Silicon carbide device with a stripe-shaped trench gate structure

A semiconductor device includes a silicon carbide semiconductor body. A first shielding region of a first conductivity type is connected to a first contact at a first surface of the silicon carbide semiconductor body. A current spread region of a second conductivity type is connected to a second contact at a second surface of the silicon carbide semiconductor body. A doping concentration profile of the current spread region includes peaks along a vertical direction perpendicular to the first surface. A doping concentration of one peak or one peak-group of the peaks is at least 50% higher than a doping concentration of any other peak of the current spread region. A vertical distance between the one peak or the one peak-group of the current spread region and the first surface is larger than a second vertical distance between the first surface and a maximum doping peak of the first shielding region.

Semiconductor device including current spread region

A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.

SiC devices with shielding structure

A method includes orienting a silicon carbide layer to a first crystal channel direction relative to a first ion beam and implanting phosphorous into the silicon carbide layer using the first ion beam to define a first doped region in the silicon carbide layer. A deviation angle between the first crystal channel direction and the first ion beam is less than ±1° and the first crystal channel direction comprises a <0001> direction or a <11-23> direction.

Semiconductor device fabricated using channeling implant

A semiconductor device includes: a silicon carbide semiconductor body having a source region of a first conductivity type and a body region of a second conductivity type; and a trench structure extending from a first surface into the silicon carbide semiconductor body along a vertical direction, the trench structure having a gate electrode and a gate dielectric. The trench structure is stripe-shaped and runs along a longitudinal direction that is perpendicular to the vertical direction. The source region includes a first source sub-region and a second source sub-region alternately arranged along the longitudinal direction. A doping concentration profile of the first source sub-region along the vertical direction differs from a doping concentration profile of the second source sub-region along the vertical direction. A corresponding method of manufacturing the semiconductor device is also described.

Semiconductor device including trench structure and manufacturing method

In an example, a substrate is oriented to a target axis, wherein a residual angular misalignment between the target axis and a preselected crystal channel direction in the substrate is within an angular tolerance interval. Dopant ions are implanted into the substrate using an ion beam that propagates along an ion beam axis. The dopant ions are implanted at implant angles between the ion beam axis and the target axis. The implant angles are within an implant angle range. A channel acceptance width is effective for the preselected crystal channel direction. The implant angle range is greater than 80% of a sum of the channel acceptance width and twofold the angular tolerance interval. The implant angle range is smaller than 500% of the sum of the channel acceptance width and twofold the angular tolerance interval.

Ion beam implantation method and semiconductor device

A method of producing a silicon carbide (SiC) device includes: forming a stripe-shaped trench gate structure that extends from a first surface of a SiC body into the SiC body, the gate structure having a gate length along a lateral first direction, a bottom surface and a first gate sidewall of the gate structure being connected via a first bottom edge of the gate structure; forming at least one source region of a first conductivity type; and forming a shielding region of a second conductivity type in contact with the first bottom edge of the gate structure across at least 20% of the gate length. Forming the shielding region includes: forming a deep shielding portion; and forming a top shielding portion between the first surface and the deep shielding portion, the top shielding portion being in contact with the first bottom edge.

Method of producing a silicon carbide device with a trench gate

A silicon carbide substrate is provided that includes a drift layer of a first conductivity type and a trench extending from a main surface of the silicon carbide substrate into the drift layer. First dopants are implanted through a first trench sidewall of the trench. The first dopants have a second conductivity type and are implanted at a first implant angle into the silicon carbide substrate, wherein at the first implant angle channeling occurs in the silicon carbide substrate. The first dopants form a first compensation layer extending parallel to the first trench sidewall.

Silicon carbide device with compensation region and method of manufacturing

According to an embodiment of a semiconductor device, the device includes: a plurality of device cells formed in a semiconductor substrate, each device cell including a transistor structure and a Schottky diode structure; and a superjunction structure that includes alternating regions of a first conductivity type and of a second conductivity type formed in the semiconductor substrate. For each transistor structure, a channel region of the transistor structure and a Schottky metal region of an adjacent one of the Schottky diode structures are interconnected by semiconductor material of the first conductivity type without interruption by any of the regions of the second conductivity type of the superjunction structure, the semiconductor material of the first conductivity type including one or more of the regions of the first conductivity type of the superjunction structure.

Power transistor with integrated Schottky diode

A semiconductor component includes: gate structures extending from a first surface into an SiC semiconductor body; a drift zone of a first conductivity type formed in the SiC semiconductor body; first mesas and second mesas arranged between the gate structures in the SiC semiconductor body; body areas of a second conductivity type arranged in the first mesas and the second mesas, the body areas each adjoining a first side wall of one of the gate structures; first shielding areas of the second conductivity type adjoining a second side wall of one of the gate structures; second shielding areas of the second conductivity type adjoining the body areas in the second mesas; and diode areas of the conductivity type of the drift zone, the diode areas forming Schottky contacts with a load electrode between the first shielding areas and the second shielding areas.

Silicon carbide field-effect transistor including shielding areas

A power semiconductor switch includes an active cell region with a drift region, an edge termination region, and IGBT cells within the active cell region. Each IGBT cell includes trenches that extend into the drift region and laterally confine mesas. At least one control trench has a control electrode for controlling the load current. At least one dummy trench has a dummy electrode electrically coupled to the control electrode. At least one further trench has a further trench electrode. At least one active mesa is electrically connected to a first load terminal within the active cell region. Each control trench is arranged adjacent to no more than one active mesa. At least one inactive mesa is adjacent to the dummy trench. A cross-trench structure merges each control trench, dummy trench and further trench to each other. The cross-trench structure overlaps at least partially along a vertical direction with the trenches.

Power semiconductor switch having a cross-trench structure

A semiconductor device includes a transistor having a drift region of a first conductivity type in a semiconductor substrate having a first main surface, a body region of a second conductivity type between the drift region and first main surface, and trenches in the first main surface which pattern the substrate into mesas. The trenches include an active trench and first and second source trenches. A source region of the first conductivity type is in a first mesa arranged adjacent to the active trench. A second mesa between the first and second source trenches is in contact with at least one source trench. A barrier region of the first conductivity type at a higher doping concentration than the drift region is arranged between the body and drift regions in the second mesa. A vertical size of the barrier region is at least twice a width of the second mesa.

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Munich, Germany

Caspar Leendertz