International Business Machines Corporation

Globalfoundries Inc.

Casey Jon Grant

Joel M Sharrow

William Alfred Syverson

Kenneth F McAvey, Jr

Alison K Easton

Kenneth H Yao

Nicole Susan Carpenter

Joseph R Drennan

Anthony K Stamper

Sebastian Theodore Ventrone

Mete Erturk

John D Gillis

Ahmed Y Ginawi

Christopher Ro

David Scagnelli

Jude L Hankey

Andrew S Hoadley

Steven M Shank

Robert K Leidy

Mousa H Ishaq

Faye D Baker

Michael C Triplett

Heidi L Greer

Kurt Alan Tallman

John Joseph Snyder

James D Weil

Francis A Abramovich

Sabastian T Ventrone

Rick H Gaylord

Mark A Pakulski

Embodiments are provided that include methods of designing an inductor. The inductor can include a conductive line including at least one turn and an opening positioned within an interior of a region of the conductive line. Embodiments of forming the inductor can include: providing an inductor design including a conductive line having at least one turn; determining a region of the conductive line that has current density below a threshold; and forming an opening in the region, the opening enclosed within the conductive line.

Methods of designing an inductor having opening enclosed within conductive line

Disclosed are embodiments of an improved design method, the results of which are a final design structure for an integrated circuit that incorporates, not only layout information, but also client-specific manufacturing information (e.g., import/export information, service requests, processing directives, purchase order requirements, design rule information, etc.) in the same data format in hierarchical form. Also disclosed are embodiments of a manufacturing control method and system. In these embodiments, a final design structure, such as that described above, is received at tape-in. The information contained therein (particularly, the client-specific manufacturing information) is sorted by type and then forwarded to the appropriate tools within the manufacturing facility for processing. By providing the client-specific manufacturing information directly to each manufacturing facility in the final design structure in conjunction with the layout information, the embodiments eliminate the need for independent information gathering by each manufacturing facility.

Manufacturing control based on a final design structure incorporating both layout and client-specific manufacturing information

A method of improving damascene wire uniformity without reducing performance. The method includes simultaneously forming a multiplicity of damascene wires and a multiplicity of metal dummy shapes in a dielectric layer of a wiring level of an integrated circuit chip, the metal dummy shapes being dispersed between damascene wires of the multiplicity of damascene wires; and removing or modifying those metal dummy shapes of the multiplicity of metal dummy shapes within exclusion regions around selected damascene wires of the multiplicity of damascene wires. Also a method of fabricating a photomask and a photomask for use in improving damascene wire uniformity without reducing performance.

Methods of fabricating photomasks for improving damascene wire uniformity without reducing performance

Embodiments of an inductor including a conductive line including at least one turn and an opening positioned within an interior of a region of the conductive line are disclosed. Embodiments of a related method of designing the inductor are also disclosed.

Inductor having opening enclosed within conductive line and related method

Methods, photomasks and methods of fabricating photomasks for improving damascene wire uniformity without reducing performance

A design structure for systems for switching a displayed signal for a display between a plurality of signals are disclosed. In one embodiment, the design structure is embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, and includes: a system for switching a displayed signal for a display between a plurality of signals, the system including: a microcontroller; a chooser for setting a primary signal from a plurality of program-variable signals; a monitor tuner coupled to the microcontroller for tuning the primary signal during switching of the displayed signal from the primary signal to a secondary signal; a detector coupled to the monitor tuner and the microcontroller for detecting a predetermined condition in the primary signal; and a selector coupled to the microcontroller for switching the displayed signal from the secondary signal to the primary signal upon occurrence of the predetermined condition.

Structure for switching system for signal monitoring and switch-back control

Systems for switching a displayed signal for a display between a plurality of signals are disclosed. In one embodiment, the system includes a microcontroller; a chooser for choosing a primary signal from a plurality of program-variable signals at the microcontroller; a monitor tuner coupled to the microcontroller for tuning the primary signal during switching of the displayed signal from the primary signal to a secondary signal; a detector coupled to the monitor tuner and the microcontroller for detecting a predetermined condition in the primary signal; and a selector coupled to the microcontroller for switching the displayed signal from the secondary signal to the primary signal upon occurrence of the predetermined condition. A user can switch between signals such as television channels or other dedicated functions without the risk of missing a portion of the program material.

Switching system for signal monitoring and switch-back control

An apparatus and method are provided for removing contaminate particulate matter from substrate surfaces such as semiconductor wafers. The method and apparatus use a material, preferably a liquid curable polymer, which is applied as a sacrificial coating to the surface of a substrate containing contaminate particulate matter thereon. An energy source is used to dislodge the contaminate particulate matter from the surface of the wafer into the sacrificial coating so that the particles are partially or fully encapsulated and suspended in the sacrificial coating. The sacrificial coating is then removed. The coating is preferably formed into a film to facilitate removal of the coating by pulling (stripping) the film providing a cleaner substrate surface.

Cleaning of semiconductor wafers by contaminate encapsulation

A method and structure for fabricating semiconductor wafers. The method comprises providing a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer is located adjacent to the second semiconductor wafer. A relationship is provided between a plurality of values for an electrical characteristic and a plurality of materials. A material is chosen from the plurality of materials existing in the relationship. A substructure is formed comprising the material sandwiched between a topside of the first semiconductor wafer and a backside of a portion of the of the second semiconductor wafer. The plurality of semiconductor wafers are placed into a furnace comprising an elevated temperature for processing resulting in a value for the first semiconductor wafer of the electrical characteristic that corresponds to said material in said relationship.

Modification of electrical properties for semiconductor wafers

A method for controlling a process on a substrate. The method comprising: providing the substrate, the substrate having an upper surface, an opposite lower surface and an edge between the upper and lower surfaces; processing the upper surface of the substrate with a first fluid; directing a second fluid against a portion of the lower surface proximate to the edge of the substrate, wherein the second fluid flows adjacent to the edge of the substrate; and controlling the temperature of the second fluid in order to affect a processing of an edge region of the upper side of the substrate.

Method and apparatus for etch rate uniformity control

A method for preparing a workpiece surface utilizing two more fluids of differing density and miscibility which create one or more fluid interfaces wherein the fluids are chosen such that the solubility or affinity of one of the fluids is high for a material to be removed from the workpiece surface while the other fluid has a low solubility or affinity for the material to be removed. The workpiece surface is treated by passing the workpiece through the fluid interface. The two or more fluids are preferably dispensed into an apparatus and allowed to settle into two or more predominant layers separated by an interface. Surface preparation techniques which may benefit from the present invention include etching, cleaning or drying processes and the like.

Method for surface preparation of workpieces utilizing fluid separation techniques

Disclosed is a method of fabricating a polysilicon line, comprising: forming a patterned hard mask layer over a polysilicon layer; patterning the polysilicon layer to provide a hard mask-capped polysilicon line having a first width; and isotropically removing portions of the polysilicon line to a second width.

Method of fabricating a narrow polysilicon line

Disclosed is a method of fabricating a semiconductor device, comprising: (a) providing a bare semiconductor substrate, the substrate having a frontside and a backside; (b) forming one or more protective films on the backside of the substrate; and (c) performing one or more wafer fabrication steps. Some or all the protective films may be removed and the method repeated multiple times during fabrication of the semiconductor device.

Growing community of inventors

Hinesburg, VT, United States of America

Casey Jon Grant