3com Corporation

Top Layer Networks, Inc.

Cary B Robins

Frank A Itkowsky

James Scott Hiscock

Barry A Spinney

John Ernest Ziegler

Brian Ramelson

Theodore L Ross

Gary D Lorenz

Krishna Narayanaswamy

Andreas Bovopoulos

Peter Driscoll

Shirish B Dandekar

A process and system for switching connections of data packet flows between nodes of data processing system networks operating on diverse protocols according to the application layer information on the data packets. The process retrieves and hashes the header information to from an index into memory where a flow tag pointer is stored. The flow tag points to flow switching information that directs the forwarding of the packet. The switching information is sent along with the packet data to direct the forwarding state information about the flow is updated in the flow switching information. The hash function includes a multiplication and division by polynomials forming a hash result and a signature result. Both hash and signature are used to ensure that the information retrieved is valid. If invalid, The pre hashed header information is parsed to determine the forwarding information. This forwarding information is stored for later use and the appropriate flow tag pointer is stored in the hash result index.

System and process for GHIH-speed pattern matching for application-level switching of data packets

Symmetric flow control in a buffered repeater having responsiveness to flow control frames. An Ethernet full duplex buffered repeater according to the present invention includes an internal arbitration mechanism allowing receive FIFOs of respective receive ports to transmit data over a local bus to remaining transmit ports in round-robin fashion. The transmit ports take the transmitted data off the local bus and transmit it over the respective link. Each transmit port monitors the capacity of an associated transmit FIFO, and when the available capacity falls below that required to store a maximum size frame, asserts an open collector output signal monitored by each of the ports. No port initiates transmission of a packet over the local bus when this signal is asserted. Rather than one of the transmit ports risking being unable to store a complete frame once transmission has begun, the local bus is suspended before the next frame is put on the local bus. As the receive FIFOs fill, Pause Frames are issued by the respective port over each associated link. Each port is responsive to received flow control frames for pausing transmission of data over the respective link. Each buffered repeater is cascadable with other such devices to implement an arbitrarily large buffered repeater.

Symmetric flow control for ethernet full duplex buffered repeater

A computer network system containing a concentrator with a backplane that has a plurality of lines. The backplane contains data lines and control lines for managing and organizing the transfer of data between modules in the concentrator. The system contains an intelligent bus arbiter system that allow the selection of transmitting modules to occur at the same time as actual data transfer is going on between other modules. The bus arbitration system is provided for determining a sequence of bus access. A memory is provided for building a table comprising entries. Each of the entries represents a module slot identification number. Each entry also has an entry link portion which links a given entry to another entry. The system also includes arbiter logic cycling through or sequencing through and reading the table from one entry to another entry based on the entry link portion. The arbiter logic forms an output of a current slot identification number, corresponding to the module which is to have access to the bus. With this system, the number of entries having a particular module slot identification number relative to the total number of entries in the table determines a proportion of access to the bus of the module having the particular module slot identification number thereby allowing updating to the table to change access to the bus more readily.

Arbitration system using linked table

A computer network system containing a concentrator with a backplane that has a plurality of lines. The backplane contains data lines and control lines for managing and organizing the transfer of data between modules in the concentrator. The system contains intelligent devices that allow the selection of transmitting modules to occur at the same time as actual data transfer is going on between other modules. This is preferably done in a round robin arbitration process where, while data is being transferred by a first module, a bus arbitration device is placing addresses of modules which sequentially follow the transmitting module onto the control lines. Modules will see their address on the control lines, and if they have a packet to transmit, they then reserve the right to transmit after the presently transmitting module is finished. In this way the selection of the next module to transmit is performed in parallel, and does not slow down, the transfer of data between modules. The control lines are also able to indicate when a receiving module has been unable to copy a packet. The transmitting module can then resend the packet for either a maximum number of retries, or until the receiving module is able to copy the packet.

High speed communication bus

Growing community of inventors

Newton, MA, United States of America

Cary B Robins