Iwatt Inc.

Dialog Semiconductor Gmbh

Carrie Seim

John William Kesterson

Junjie Zheng

Yong Li

Hien Huu Bui

Andrew Kwok-Cheung Lee

Jun Zheng

Allan Ming-Lun Lin

Fuqiang Shi

Liang Yan

Xuecheng Jin

Clarita C Poon

Selcuk Sen

The drive current of the switch in a switching power converter is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the switch drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the switch drive current.

Magnitude adjustment of the drive signal of a switching transistor of a switching power converter

A switching power converter comprises a transformer (), a switch () coupled to the transformer (), and a switch controller () coupled to the switch () for generating a switch drive signal () to turn on or off the switch (). The drive current of the switch drive signal () is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the drive current.

Dynamic drive of switching transistor of switching power converter

A digital phase lock loop circuit provides an output with reduced jitter. The digital phase lock loop circuit includes a phase frequency detector that determines a phase difference between a feedback signal and a reference frequency signal to generate an error signal indicative of the phase difference. A numerically controlled oscillator generates a first oscillator output signal with a frequency proportional to the error signal and a second oscillator output signal indicative of jitter of the first oscillator output signal in reference to the reference frequency signal. A phase accuracy extender determines a delay amount from the second oscillator output signal and delays the first oscillator output signal by the delay amount to generate a phase-enhanced output signal with edges aligned with one of a plurality of reference clock signals.

Digital phase lock loop with multi-phase master clock

Adaptive multi-mode digital control schemes that improve the light-load efficiency (and thus the overall average efficiency) in switch-mode power converters without causing performance issues such as audible noises or excessive voltage ripples. Embodiments include a switch-mode power converter that reduces current in the power converter using a second pulse-width-modulation (PWM) mode before reaching switching frequencies that generate audible noises. As the load across the output of the power converter is reduced, the power converter transitions from a first PWM mode in high load conditions to a first pulse-frequency-modulation (PFM) mode, then to a second PWM mode, and finally to a second PFM mode. During the second PFM mode, the switching frequency is dropped to audible frequency levels. Current in the power converter, however, is reduced in the second PWM mode before transitioning to the second PFM mode. Therefore, the power converter produces less or no audible noise in light load conditions where the switching frequency drops to audible frequency levels, while achieving high efficiency across varying load conditions.

Adaptive multi-mode digital control improving light-load efficiency in switching power converters

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Campbell, CA, United States of America

Carrie Seim