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Stmicroelectronics S.r.l.

Carmela Albano

Daniele Vimercati

Marco Onorato

Mounia El-Moutaouakil

In a charge-pump device, a charge-pump circuit has an input, which is connected to a supply line and receives a supply voltage, and an output; in the charge-pump circuit a first elementary stage defines a first transfer node and a second transfer node that can be connected respectively to the input and to the output, and has at least one first phase input. In addition, in the first elementary stage a first switching element is arranged between the first transfer node and the second transfer node, has a control terminal receiving a control signal, and is closed during a charge-transfer interval; and first charge-storage means are connected between the control terminal and the first phase input. In the first elementary stage, a voltage-booster stage has an input connected to the first phase input of the first elementary stage, and an output connected to the first charge-storage means and supplies a boosted phase signal; in particular, the voltage-booster stage is operative during the charge-transfer interval.

Charge-pump device with increased current output

A non-volatile memory device includes an array of memory cells organized into a plurality of array sectors, with each array sector being singularly addressable through an array wordline. An array of reference cells is addressable through a reference wordline. A respective voltage ramp generator is provided for each array sector for generating a voltage ramp on an array wordline for reading a memory cell therein, and is provided for each array of reference cells for generating a voltage ramp on a reference wordline for a reference cell therein. A respective row decoding circuit is coupled between each respective voltage ramp generator and corresponding reference wordline or array wordline. A current generator generates a current to be injected on a circuit node in a selected array sector and on a circuit node of the array of reference cells to produce on the circuit nodes a voltage ramp similar to the generated voltage ramp. A respective local ramp generating circuit is provided for each array sector and for the array of reference cells, and delivering a charge current based upon a capacitance of the circuit nodes of the corresponding addressed array wordline or reference wordline, towards the respective row decoder of the wordline.

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Sant'Agata Li Battiati, Italy

Carmela Albano