International Business Machines Corporation

Carlton M Osburn

Tak H Ning

Hwa N Yu

Ernest Bassous

Arnold Reisman

Marvin B Skolnik

Peter Pleshko

Carl Altman

A mirror array light valve is described comprising a transparent substrate, a plurality of post members arranged in a regular array on said substrate, and a plurality of deflectable square, rectangular, hexagonal or the like light-reflecting elements arranged in a regular array on said post members such that a post member is positioned under a corresponding corner of each element; methods for making the mirror array light valve are also described.

Mirror array light valve

A field effect transistor (FET) comprising a floating gate and a control gate in a stacked relationship with each other and being self-aligned with each other and self-aligned with respect to source and drain regions. The fabrication technique employed comprises delineating both the floating gate and control gate in the same lithographic masking step.

Method of making FET containing stacked gates

FET Containing stacked gates

A method, including a sequence of process steps, for fabricating insulated gate field effect transistors having very short effective channel lengths. In a first version of the method, the source and drain regions of the device are opened in one process step and self-alignment of the source and the drain to the gate is achieved in one masking step. The drain region is then masked and the source side of the channel is implanted to adjust the threshold voltage of the high threshold voltage channel region. In a second version of the method, the source region is opened and self-aligned with the gate prior to the opening of drain region. Implantation to adjust the threshold voltage of the high threshold voltage channel region takes place before the drain region is opened, and then the drain region is opened and self-aligned with the gate in a further masking step. In either version, the threshold voltage is adjustable and the channel length is controlled to be a small value.

Method for fabricating transistor structures having very short effective

Positive charges that appear in the gate silicon oxide insulation of a silicon insulated gate field-effect transistor device may be controlled through neutralization by injecting electrons in to the gate oxide from the substrate after the device is complete and metallized by irradiating the back of the substrate with light in the presence of a voltage bias.

Growing community of inventors

Croton-on-Hudson, NY, United States of America

Carlton M Osburn