Intel Corporation

Carlos Mejia

Gary A Brist

Gary Baxter Long

William O Alger

Bryce D Horine

A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.

Conductor trace design to reduce common mode cross-talk and timing skew

An apparatus and system, as well as fabrication methods therefor, may include a conductor attached to a carrier to bridge a contact field defined by a circuit that can be mounted to a circuit board.

Power delivery apparatus, systems, and methods

An apparatus for receiving a microchip and having a conductor buses therein. A top surface of the apparatus receives the microchip while the bottom surface is to mount to a circuit board. A plurality of pin receptacles pass through the top surface to receive a corresponding plurality of microchip pins of the microchip. The conductor bus resides at least in part between the top surface and the bottom surface and is electrically coupled to a first plurality of the plurality of the pin receptacles.

Array socket with a dedicated power/ground conductor bus

A method is provided for forming a waveguide in a printed circuit board. This may include forming a trench in a printed circuit board substrate and forming at least one metalized surface along the trench. A metalized capping surface may be provided over the trench so as to form the waveguide structure.

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Portland, OR, United States of America

Carlos Mejia