Siemens Aktiengesellschaft

Carlos-Alberto Mazure-Espejo

Franz Neppl

Josef Winnerl

Erwin P Jacobs

A method for the manufacture of neighboring wells 9, implanted with dopant ions of differing conductivity type in silicon substrates provided with an epitaxial layer. A lateral under-etching having high selectivity to specified layers is designationally introduced into a silicon nitride layer provided for masking the n-well regions in the implantation of the p-wells. Thus, the edge of a silicon oxide layer serving as a masking in the following oxidation shifts in the direction of the n-wells. As a result of this type of self-adjusted well production, the influence of the counter-doping in the region of the well boundaries is noticeably reduced. In addition, a polysilicon layer can also be employed under the silicon nitride layer as a masking layer, this layer eing co-oxidized after the under-etching of the silicon nitride layer. Thus a box-shaped course is produced in the masking oxide instead of the prior art bird's bill course, whereby a steeper diffusion front is achieved in the n-well. The method serves for the manufacture of VLS1 complementary MOS field effect transistor circuits.

Methods for making neighboring wells for VLS1 CMOS components

A method for the manufacture of LSI complementary MOS field effect transistor circuits to increase the latch-up hardness of the n-channel and p-channel field effect transistors while retaining good transistor properties by incorporating a further epitaxial layer and highly doped implantation regions into a lower epitaxial layer from which the wells are generated by out-diffusion into the upper epitaxial layer. In addition to achieving optimum transistor properties, the reduced lateral diffusion provided enables a lower n.sup.+ /p.sup.+ spacing, and thus achieves a higher packing density with improved latch-up hardness.

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Kirchseeon, Germany

Carlos-Alberto Mazure-Espejo