Ams Ag

Austriamicrosystems Ag

Sgs-thomson Microelectronics S.r.l.

Ams International Ag

Carlo Fiocchi

Marco Cerchi

Guido Torelli

Valerio Pisati

Monica Schipani

Matteo Colombo

Paolo Draghi

Alessandro Carbonini

Andrea Pierin

A low-dropout regulator having an output current branch being arranged between a supply line to provide a supply potential and an output node to provide a regulated output voltage. The output current branch includes an output driver to provide an output current at the output node. The output driver has a control connection to apply a control voltage to operate the output driver with a different conductivity in dependence on the control voltage. The LDO includes an input amplifier stage to provide the control voltage to the control connection of the output driver. The input amplifier stage is configured to provide the control voltage with a different slew rate in dependence on an increase or decrease of the output current.

Low-dropout regulator having reduced regulated output voltage spikes

A low-dropout regulator comprises an output current branch () in which a first output driver () and a second output driver () is arranged. An input amplifier stage () provides a first control current (I) to control the operating state of the first and the second output driver (). A current generator unit () provides a second control current () to operate the first output driver () in the second operating state and provides a third control current () to operate the second output driver () in the second operating state, when the first control current (I) of the input amplifier stage () is below a threshold level.

Low-dropout regulator having sourcing and sinking capabilities

A level shift regulator circuit comprises a level shift transistor (Mls) and an output transistor (Mreg) being arranged in series to the level shift transistor (Mls) in an output path (OP). The circuit comprises a feedback path (FP) being arranged between an input node (IN) of the output path (OP) and a gate connection of the output transistor (Mreg). A current splitter (CS) is provided to split a current of a current source (IS) coupled to the input node (IN) to reduce the loop gain. A current mirror (CM) is arranged in series to the current splitter (CS) to reduce the signal current provided by the current splitter (CS) to the gate connection of the output transistor (Mreg) to further reduce the gain and to improve stability of the circuit. A first and second filter (F, F) may optionally be provided to improve the phase response.

Feedback based level shift regulator circuit with improved stability

A low dropout regulator comprises an output transistor with a controlled section between a first supply terminal and an output terminal, and a differential amplifier comprising a feedback input coupled to the output terminal, a reference input receiving a reference voltage, an output connected to a control terminal of the output transistor, and a pair of input transistors connected to a tail current source. A control terminal of a first transistor is connected to the reference input. A control terminal of a second transistor is connected to the feedback input. A first capacitive element is coupled between the output terminal and common connection of the input transistors of one pair with their tail current source. A second capacitive element is coupled between a second supply terminal and the common connection of the input transistors of one pair with their tail current source.

Low dropout regulator

In one embodiment a low-dropout regulator comprises a first differential amplifier (Nmos) to receive an input voltage (Vin), a power transistor (T) coupled to the first differential input pair (Nmos), the power transistor having an output (OUT) forming an output terminal of the low-dropout regulator to provide an output voltage (Vout) as a function of the input voltage (Vin), a second differential amplifier (Pmos) coupled to the first differential amplifier (Nmos), and a switching element (Mncut, Mncut) coupled between first and second differential amplifier (Nmos, Pmos), said switching element (Mncut, Mncut) being operated as a function of a feedback signal (Sfb) derived from the output voltage (Vout). The second differential amplifier (Pmos) is complementary to the first differential amplifier (Nmos). The low-dropout regulator is operated in one of two modes such that in a first mode the second differential amplifier (Pmos) is enabled and in the second mode the first differential amplifier (Nmos) is enabled and the second differential amplifier (Pmos) is disabled by means of the switching element (Mncut, Mncut).

Low-dropout regulator and method for regulating voltage

A control circuit arrangement for pulse-width modulated DC/DC converters includes a phase generator for a complementary driver which provides respective gate signals to a first and second driver transistor in response to a control signal. A clock control circuit receives a clock signal and a pulse-width modulated signal and provides the control signal in response to a signal edge of the pulse-width modulated signal and the clock signal applied thereto. A mode selection input terminal receives a mode selection signal to select a first mode or a second mode of operation. The phase generator provides in the first mode each of the gate signals the control signal and the respective other gate signal. In the second mode of operation, it provides each gate signal in response to the control signal.

Control circuit arrangement for pulse-width modulated DC/DC converters and method for controlling a pulse-width modulated converter

An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal.

Amplifier with non-linear current mirror

A voltage regulator, comprising: an input terminal; an output terminal at which an output voltage is provided; an output transistor which couples the input terminal of the voltage regulator to the output terminal of the voltage regulator; and a transimpedance amplifier including an input terminal which is coupled to the output terminal of the voltage regulator and an output terminal which is coupled to a control terminal of the output transistor, optionally via a coupling, the coupling having an impedance value between the output terminal of the transimpedance amplifier and the control terminal of the output transistor which at a given frequency is smaller than or equal to an impedance value of an output impedance of the transimpedance amplifier.

Voltage regulator and method for voltage regulation

An amplifier arrangement includes an output amplifier stage (OA) comprising a stage input (SIN), a stage output (SOUT) which is coupled to a signal output (OUT) of the amplifier arrangement, and a capacitive element (CE) which couples the stage output (SOUT) to the stage input (SIN). A driver stage (DR) comprises a driver input (DIN) and a driver output (DOUT) which is coupled to the stage input (SIN). The driver stage (DR) is configured to generate a voltage potential at a driver output (DOUT) depending on an input current at the driver input (DIN) and to provide a charging current to the capacitive element (CE) being higher than the input current.

Amplifier arrangement and signal generation method

A voltage regulator for electrically programmable, non-volatile memory devices has an output terminal connected to a power supply line for programming the state of at least one memory element through at least one selection circuit. At least first and second resistive elements are connected between first and second terminals of a voltage supply. At least a first circuit is matched to the at least one selection circuit, and the first circuit is coupled serially with the resistive elements between the two terminals of the voltage supply. At least one control current generator is connected between one of the first and second voltage supply terminals and a node linking to one of the resistive elements, and the current of the controlled current generator is controlled to be a function of current through the at least one selection circuit. An operational amplifier has an inverting input and a non-inverting input, and the non-inverting input is connected to a node linking to at least one of the resistive elements. An output terminal of the operational amplifier is the regulator output terminal to which the inverting input is coupled.

Growing community of inventors

Belgioioso, Italy

Carlo Fiocchi