Sgs Microelettronica Spa

Sgs-thomson Microelectronics S.r.l.

Sgsates Componenti Elettronici S.p.a.

Sgs-thomson Microelectronics S.p.a.

Sgs-thomson Microelectronics Limited

Siemens Automotive S.a.

Gs Microelettronica S.p.a.

Carlo Cini

Claudio Diazzi

Domenico Rossi

Bruno Murari

Fabrizio Stefani

Pietro Erratico

Luigi Sisti

Franco Bertotti

Angelo Massironi

Flavio Francesco Villa

Claudio Contiero

Paola Galbiati

Angelo Alzati

Sandro Storti

Giovanni Pietrobon

Marc Simon

Mario Santi

Giuseppe Gattavari

An output power stage which includes a PNP pull-up transistor and an n-channel FET push-down transistor, driven in phase opposition. This fully complementary stage provides an outstandingly improved power handling capability per semiconductor area occupied, together with a large output voltage swing, but does not require the use of externally connected discrete boot-strap components. The bipolar pull-up transistor can optionally be driven through an FET auxiliary stage, to minimize the power requirements of the preceding signal amplification stage.

Bipolar-plus-DMOS mixed-typology power output stage

A circuit for measuring current in a power MOS transistor (M0) comprises second (M1) and third (M2) transistors in series of the same type and same technology as, but having a smaller surface than, the power transistor and arranged in parallel on the latter. The two series transistors have their gates connected to the gate of the power transistor. The current in transistor (M2) which is connected to the reference electrode of the power transistor is measured.

Circuit for measuring current in a power MOS transistor

A process for manufacturing devices with improved connections between the pins and the semiconductor material chip which integrates electronic components. In order to allow the integration of signal components and power components in a same device with a reduced use of area for the soldering pads and with high reliability of the connections, the connecting wires are made of different materials. Advantageously, the wires for the power connections are based on aluminum and have large diameters, and the wires for the signal connections are gold-based and have a small diameter. In order to ensure good soldering, the ends of the pins on which the connecting wires are to be soldered are gold-plated.

Process for manufacturing integrated device with improved connections

An integrated device with improved connections between the pins and the semiconductor material chip which integrates electronic components. In order to allow the integration of signal components and power components in a same device with a reduced use of area for the soldering pads and with high reliability of the connections, the connecting wires are made of different materials. Advantageously, the wires for the power connections are based on aluminum and have large diameters, and the wires for the signal connections are gold-based and have a small diameter. In order to ensure good soldering, the ends of the pins on which the connecting wires are to be soldered are gold-plated.

Integrated device with improved connections between the pins and the

An electronic circuit with a protection device against fluctuations in the supply battery voltage, being of a type which comprises a MOS power transistor connected between one pole of the battery and an electric load for driving said load to ground, further comprises a pair of Zener diodes connected to each other in a push-pull configuration, between said pole and the gate electrode of the power transistor.

Electronic circuit with a protection device against fluctuations in the

A guarded electronic circuit from reversal of its supply battery polarity comprises a MOS power transistor connected between one pole of the battery and ground, to drive an electric load to ground, and a second, protection MOS transistor connected between the pole and the first transistor; said transistors, which are both provided with respective inherent diodes between the source and the drain, have their related drain electrodes connected together. The resulting circuit is self-protected against possible reversal of the polarity of the battery to which it is connected, and can protect the electric load driven thereby.

Guarded electronic circuit from reversal of its supply battery polarity

In this MOS-transistor bridge circuit, for obtaining a fast flyback conduction of the current after a normal operation of the circuit, instead of the flyback diodes associated with each transistor of the bridge, the MOS transistors themselves are employed, driven so as to conduct current from the ground to the power supply, that is in the opposite direction with respect to that of normal operation. For this purpose a control section is provided receiving at the input a fast flyback signal and comprising delay gates connected to the disable inputs of the transistors, so as to delay switching off thereof, and to maintain in the on state two diagonally opposed transistors so as to allow current to flow from the ground to the power supply through these diagonally opposed transistors and the load until the current decreases to zero.

MOS-transistor bridge circuit

A multiple-chip semiconducting element in a case of metal and resin consists of a metallic plate, a body of synthetic resin which incorporates a portion of the plate, leaving free a larger surface thereof, and a large number of metallic terminals issuing from the same side of the resin body. Inside the resin body, a first semiconductor element chip is affixed to the metallic plate and a second semiconductor element chip is affixed to a metallic lamina made integral with at least one of the terminals and insulated electrically from the plate.

Multiple-chip semiconductor element in a case of metal and resin

A circuit for holding a MOS power transistor in a conduction state on the occurrence of an outage in the voltage supply, being of a type which comprises a first MOS transistor having its source connected to a line of the voltage supply and its drain connected to the gate of the power transistor, further comprises a diode connected between the drain of the first transistor and the gate of the power transistor, and a second transistor of the MOS type having its gate connected to the gate of the first transistor drain connected to the gate of the power transistor. The circuit prevents the gate capacitance of the power transistor from becoming discharged on a failure of the voltage supply, thus holding that transistor in a conducting state.

Circuit for holding a MOS transistor in a conduction state in a voltage

Disclosed is a monolithic integrated semiconductor device which may contain specimens of seven different circuit components; namely: lateral N-MOS and lateral P-MOS transistors (CMOS), vertical N-DMOS and vertical P-DMOS transistors, vertical NPN bipolar transistors, vertical PNP bipolar transistors with isolated collector and low leakage junction diodes as well as a process for fabricating such a device.

Monolithically integrated semiconductor device containing bipolar

This charge pump circuit comprises a capacitor connected with a first terminal thereof to a reference voltage point through a first switch element and with a second terminal thereof to a switching section. The switching section, which is arranged between a positive supply voltage line and the ground, is controlled so as to alternately and selectively connect the second terminal of the capacitor to the positive supply and to ground. The first terminal of the capacitor is further connected to the gate of the MOS transistor to be driven. During operation the switch section is controlled so as to alternately charge the capacitor and allow transfer of the charge of the capacitor to the MOS transistor gate, thereby achieving a fast charging of the MOS transistor and a low circuit dissipation in the DC mode.

Charge pump circuit for driving N-channel MOS transistors

This circuit, for reliably driving a load both in DC and AC mode with a low dissipation, comprises a pair of MOS power transistors, in a push-pull configuration, and a bootstrap circuit including a bootstrap capacitor placed between the source of the upper MOS transistor and a reference voltage point, through a first switch. A second switch is arranged between the supply line and the gate of the upper MOS transistor, while a third switch is arranged between the gate of the upper MOS transistor and the point common to the first switch and the bootstrap capacitor. During DC operation, the switches are open or closed in order to allow for the connection of the gate of the MOS power transistor to the supply voltage. During AC operation, the switches are controlled thereby, alternately the capacitor is charged at the voltage of the reference voltage point and the upper MOS transistor is held at a gate-to-source voltage sufficient to feed the load.

Drive circuit for N-channel power MOS transistors of push-pull stages

The switching driving device with current limitation, operating reliably even with high switching frequencies, comprises a drive stage receiving at the input a timing clock signal at a preset frequency and generating at the output a drive signal synchronized with the timing clock signal, a power element connected at the input to the drive stage, receiving therefrom the drive signal and generating a load supply signal, a load fed by the power element, and a current sensor generating an overload signal when the current in the load has reached a preset threshold. The current limitation is obtained through a memory element connected to the current sensor and disabling the drive stage in the presence of the overload signal. In order to obtain a reliable operation, in the presence of the overload signal the drive stage is controlled at a switching frequency which is lower than the preset frequency of the timing clock signal.

Current limited for constant current for switching driving devices

A monolithically integrable high-efficiency control circuit for the switching of transistors includes a first transistor whose base terminal is connected to a source of switching signals. A second transistor whose base is connected to a current generator, drives a third transistor which connected in series with the first transistor such that the first and third transistors are connected between two terminals of a supply voltage generator. The emitter terminal of the third transistor forms an output terminal of the control circuit and is connected to the collector terminal of the first transistor by means of a parallel connected diode and a resistor combination. The circuit also includes a fourth transistor, whose base terminal is connected through a resistor to the base terminal of the third transistor and whose collector and emitter terminals are respectively connected to the base terminal of the second transistor and to the collector terminal of the first transistor.

Monolithically integratable high-efficiency control circuit for

In an audio switching power amplifier, muting apparatus provided for eliminating noise signals associated with turn-on and turn-off operations of the apparatus is disclosed. The muting apparatus disables the output power amplifiers and controls signal levels at various positions in the power amplifier to reduce transient conditions. Control apparatus applies the muting signals to the power amplifier during a predetermined period during start-up of the amplifier and applies the muting conditions immediately upon the turning off of power to the power amplifier.

Growing community of inventors

Cornaredo, Italy

Carlo Cini