Unisys Corporation

Other

Carl L Ostrowski

Robert H Carlson

James Rhodes

Terry Sinclair Connacher

A signal translator circuit, for use in sending test signals to an IC-chip in a chip testing system, includes first and second resistors, and a single transistor. The transistor has a current channel which is coupled in series with the first resistor between a source voltage terminal and an output terminal. The single transistor also has a control lead, for enabling and disabling the flow of current through the current channel, which receives an input test signal at voltage levels that are to be translated. The output terminal is coupled through the second resistor to a reference voltage terminal. The output terminal is also coupled to an input terminal of a socket which is structured to hold the IC-chip.

Single-transistor two resistor circuit which translate test signals to selectable voltage levels

An electromechanical module, for holding IC-chips in a chip testing system, includes a circuit board having a plurality of sockets mounted thereon. Each socket is structured to hold one IC-chip that is to be tested, and each socket has a corresponding register on the circuit board. In addition, a bus is on the circuit board, which&#x2014;a) sends a timing pulse to a clock input on all of the registers in parallel, and b) concurrently sends a clock signal and N&#x2212;1 test signals to N data inputs on all of the registers. Further, each socket has N input terminals that are connected to N outputs on a respective set of signal translators on the circuit board, and each set of signal translators has N inputs that are connected to N data outputs on the socket's corresponding register.

Electromechanical module, for holding IC-chips in a chip testing system, that synchronizes and translates test signals to the IC-chips

In a data processing system having a data processor coupled to a SCSI channel disposed for transmitting and receiving data between the data processor and a peripheral storage subsystem, a bridge controller for expanding the maximum allowable number of disk drives connectable to the SCSI channel. The bridge controller comprises a microprocessor having input/output terminals coupled to a CPU bus; a memory having input/output terminals coupled to a DMA bus; a buffer coupled between the CPU bus and the DMA bus; a first transceiver coupled between the DMA bus and the SCSI channel; a second transceiver coupled between the DMA bus and the disk drives; and, a circuit for controlling the direction of data flow through the buffer. The circuit has input/output terminals coupled to the CPU bus and a control output coupled to a direction control input terminal of the buffer. The circuit also includes a decoder for decoding the operation requested by the microprocessor and for granting a DMA bus request signal in response thereto; and, an arbitrator that arbitrates between DMA request signals from the microprocessor, the first transceiver or the second transceiver so that a DMA bus grant signal is granted to only one at a time.

SCSI bus capacity expansion controller using gating circuits to

The disclosed invention is an apparatus in a computer peripheral device for determining the direction of signal flow and data flow on a SCSI bus, which apparatus comprises a time delay means responsive to status signals of the SCSI bus. The time delay means generates a signal that defines an arbitration selection period of time for determining control of the SCSI bus. The apparatus further includes a first circuit means responsive to the arbitration selection signal and status signals of the SCSI bus. The first circuit means generates a plurality of signals that determine whether the peripheral device is an initiator of signals to be transmitted on the bus or is a target for receipt of signals present on the bus. Moreover, the apparatus includes a second circuit means that is responsive to the plurality of signals generated by the first circuit means and status signals of the bus. The second circuit means generates a pair of signals indicative of the direction of data and signal flow on the SCSI bus.

Apparatus for determining the direction of signal/data flow on CSI bus

The disclosed invention is a unique apparatus for converting signal formats. For example, the apparatus can convert from a single-ended to a differential format without the necessity of additional control circuitry. A cross-circuit arrangement prevents an undesired reversal of direction for conversion of signal formats.

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Ann Arbor, MI, United States of America

Carl L Ostrowski