Harris Corporation

E-systems, Inc.

Intersil Americas Inc.

Conexant, Inc.

B-systems, Inc.

Carl F Andren

William H Mosley, Jr

Leonard V Lucas

Jim Snell

Mark A Webster

John Christ Fakatselis

David E Sanders

George R Nelson

Perry W Frogge

Lex A Scott

Karen W Halford

David Allen Olaker

Charles L Zahm

James Leroy Snell

Billy R Poston

John A Schachte

Al Petrick

L Victor Lucas

Edward A Payne

Leonard Victor Lucas

Ravindra V Gokhale

A spread spectrum radio transceiver includes a high data rate baseband processor and a radio circuit connected thereto. The baseband processor preferably includes a modulator for spread spectrum phase shift keying (PSK) modulating information for transmission via the radio circuit. The modulator may include at least one modified Walsh code function encoder for encoding information according to a modified Walsh code for substantially reducing an average DC signal component to thereby enhance overall system performance when AC-coupling the received signal through at least one analog-to-digital converter to the demodulator. The demodulator is for spread spectrum PSK demodulating information received from the radio circuit. The modulator and demodulator are each preferably operable in one of a bi-phase PSK (BPSK) mode at a first data rate and a quadrature PSK (QPSK) mode at a second data rate. These formats may also be switched on-the-fly in the demodulator. Method aspects are also disclosed.

High data spread spectrum transceiver and associated methods

A wireless transceiver including an oscillator, a radio, a baseband processor and MAC device that performs apiori frequency offset correction. The radio converts between RF signals and baseband signals. The baseband processor includes a frequency correction loop, an inverter and a combiner. The frequency correction loop generates a frequency offset signal based on a frequency difference between an oscillator reference frequency and frequency of a received signal. The inverter inverts the frequency offset signal and the combiner adjusts frequency of a transmit signal by the inverted frequency offset signal. The MAC processes received packets, identifies packets received from an AP, provides packets to the baseband processor for transmission, and controls the baseband processor to adjust transmit signals to a frequency of the AP. The baseband processor may include a memory or filter to store or update frequency offset values.

Frequency correction system for a wireless device communicating in a wireless local area network

The performance of a RAKE receiver for indoor multipath WLAN applications on direct sequence spread spectrum signals having relatively short codeword lengths is enhanced by embedding a decision feedback equalizer structure in the signal processing path through the receiver's channel matched filter and codeword correlator. The decision feedback equalizer serves to cancel both inter-codeword interference (ISI) or &ldquo;bleed-over&rdquo; between codewords, and intra-codeword chip interference (ICI) or smearing of the energy within the chips of a respective codeword.

Rake receiver with embedded decision feedback equalizer

A demodulator used in a base band processor of the spread spectrum radio transceiver includes a demodulator circuit for spread spectrum phase shift keying (PSK) demodulating an information signal received from a radio circuit. The information signal includes data symbols formed from a plurality of high rate mode chips forming a spread spectrum information signal. At least one predetermined code function correlator is in line with a signal input for decoding the information signal according to a predetermined code. A carrier loop circuit allows phase and frequency tracking of the information signal and a chip decision circuit is operative with the carrier loop circuit for tracking high rate mode chips. A decision feedback equalizer formed from a feedback finite impulse response filter is operative with the chip decision circuit and the carrier loop circuit. It has a plurality of feedback taps. At least one feedback tap is selected for logical add/subtract operations to aid in canceling multipath signal echoes. A feed forward finite impulse response filter can also be positioned in line to the code function correlator and the signal input and has a plurality of feed forward taps that are selected for logical multiply operations to aid in reducing multipath signal echoes. A method aspect of the invention is also disclosed.

Wireless local area network spread spectrum transceiver with multipath mitigation

A method and spread spectrum transceiver for demodulating a spread spectrum signal is disclosed. A spread spectrum phase shift keyed (PSK) modulated information signal is received within a demodulator of a spread spectrum receiver on a signal channel. The information signal includes a sequence of data symbols formed from a plurality of high rate mode chips. A precursor portion of the signal channel is Viterbi detected. A multi-state trellis is formed having a predetermined number of states. A post-cursor portion of the signal channel is feedback equalized with a finite impulse response filter having feedback taps operatively connected to a chip detection circuit that tracks high rate mode chips and a carrier loop circuit for phase and frequency tracking. The information signal is despread within a spread spectrum code function correlator.

Spread spectrum transceiver for use in wireless local area network and having multipath mitigation

The performance of a RAKE receiver for indoor multipath WLAN applications on direct sequence spread spectrum signals having relatively short codeword lengths is enhanced by embedding a decision feedback equalizer structure in the signal processing path through the receiver's channel matched filter and codeword correlator. The decision feedback equalizer serves to cancel both inter-codeword interference (ISI) or 'bleed-over' between codewords, and intra-codeword chip interference (ICI) or smearing of the energy within the chips of a respective codeword.

A digital data radio receiver and method evaluates a data signal preamble received on an antenna to determine whether the antenna should receive the data signal following the preamble. The receiver determines frequency offsets from a desired frequency for each symbol in a block of symbols in the preamble, determines the variance of the frequency offsets, determines the average magnitude of the symbols in the block of symbols, where the determination of average magnitude may be performed in parallel with the determination of variance of the frequency offsets, and evaluates the variance and the average magnitude for the block of symbols to determine whether the preamble is actually noise and to assess reception quality at the antenna. In a two antenna diversity receiver system, these steps may be performed first on a block of symbols received at one antenna and then performed on the next block of symbols received at another antenna. This provides two evaluations that may be compared to select the antenna with the best reception.

Short burst acquisition circuit and method for direct sequence spread

A method of estimating signal quality in a radio demodulator receiving an input stream of symbols includes the steps of sampling a phase-only portion of each of the symbols in the input stream, determining a phase error for each of the samples of the phase-only portions, and calculating a signal quality estimate from a plurality of the sample phase errors. The signal quality estimate may be an average magnitude of a predetermined number of sample phase errors. The input stream may be symbols in the preamble, or symbols in the data signal that follows.

Method of estimating signal quality in a DPSK demodulator

A direct sequence spread spectrum receiver and method for acquiring radio-frequency signals is provided for acquiring data from signals which have been transmitted in a spread spectrum system. The receiver is capable of receiving short data bursts from transmitters without prior knowledge of the time or location of the transmission and rapidly acquiring the signal before continuing with reliable data demodulation. The system includes one or more antennae for receiving RF signals which may be selectively connected to provide the received signals to the system for processing, a quadrature demodulator for providing I and Q baseband signals to a digital baseband processor which includes A/D converters, dual correlators for despreading the digital I and Q signals, a cartesian to polar converter, a demodulator for demodulating the polar coordinate digital I and Q signals, and a data descrambler for obtaining a serial data stream which may be provided to a serial interface.

Short burst direct acquisition direct sequence spread spectrum receiver

A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes by using only several of the most significant bits of the counter to change the A/D converter reference voltage.

A/D reference level adjustment circuit to maintain optimum dynamic range

In a direct sequence spread spectrum receiver, an apparatus for obtaining and adjusting bit synchronization. In one aspect, the bit synchronization is adjusted by selectively inverting a clocking circuit to delay sampling by one-half a clock cycle and to combine the inversion with a skipping of one cycle to advance the sampling by one-half cycle. In another aspect of the invention, the synchronization circuit avoids overflow of accumulating components by downshifting both the partial sums and the input data when needed.

Fast acquisition bit timing loop method and apparatus

Identification and extraction of hybrid, frequency-hopped direct sequence pseudo noise (FH/DS), signals from a multiband signal environment is effected by a sequential signal processing technique which examines the distribution of the energy content within a prescribed sub-spectrum window that is iteratively scanned or `slides` across the overall signal spectrum of interest. Based upon this energy content distribution, in particular the extent to which a sub-spectrum window contains energy that exhibits significant conjugate phase symmetry associated with a direct spread signal, the inventive signal processing technique proceeds to emphasize the spectral composition of components of which hybrid signals are comprised and to deemphasize the spectral composition of signals other than those contained in hybrid signals. Potential hybrid signal candidates whose spectral composition has been emphasized are then selectively combined with the deemphasized signals to isolate and identify the hybrid signals.

Mechanism for extracting hybrid (fh/ds) spread spectrum signals within

A low probability of intercept communication system (CCSK)--modulates information signals onto an inverse fast Fourier transformation of a large number of simultaneous frequencies that have been determined to be reasonably `quiet` within a given system bandwidth, so as to produce a time domain pulse waveform. The amplitude of each transmitted frequency is weighted. Within the receiver equipment of each participant in the system, the incoming pulse waveform produced by the inverse fast Fourier transformation mechanism at the source is coupled to a fast Fourier transform operator, so as to separate the time domain signal into a plurality of frequency components that contain the modulated data. These components are then convolved with a replica of the plurality of quiet channels to derive a time domain output waveform from which the data modulation can be identified and recovered. Even if a jamming threat is injected into one or more of the `quiet` channels that has been selected as a participating carrier, by virtue of the signal analysis and recovery process employed by each unit for incoming signals, jamming spikes are effectively excised.

Low probability of intercept communication system

In a spread spectrum communications system employing cyclic code shift keying as its primary modulation, the transmission waveform is spread for transmission security by modulo-2 adding a pseudo-noise sequence to the CCSK data symbols prior to phase modulating onto a carrier signal for transmission. If the transmission modulation is minimum shift keying (MSK) the two components of the data stream are applied to the carrier with a differential encoding step implicit in the modulation scheme. This differential encoding characteristic makes stripping of the PN spread function prior to CCSK demodulation difficult at the receiving end. In order to demodulate this waveform in an optimum manner, an array correlator, the adjacent correlator stages of which have one chip relative time displacements of their CCSK reference waveform, is employed. In effect the array correlator becomes a parallel array of matched filters matched to each cyclic shift of the incoming waveform. By modulo-2 addition of the PN spreading waveform with the time displaced CCSK reference waveform in each stage of the correlator, the correlator can be made to match all versions of the spread symbol being received.

Spread spectrum correlator for recovering CCSK data from a PN spread MSK

A detector (20) is provided for use in a communication receiver where a received spread spectrum data signal is detected using a locally generated reference signal to decode the data signal. The detector (20) includes first (22) and second channels (24) and circuitry (90) for applying the received encoded data signal to the first (22) and second channels (24). A local generator (50) is provided for generating the reference signal wherein the reference signal has polarity transitions. A demodulator (40) is included in the first channel (22) for generating a detected recovered data signal from the received data signal in response to the reference signal. Circuitry (52) is provided for detecting the polarity transitions in the reference signal and for generating a differential PN signal. Circuitry (42) is further provided in the second channel (24) for correlating the received data signal and the differential PN signal to thereby generate a recovered error signal. The recovered data signal and the recovered error signal are correlated by circuitry (58) to generate a control signal for application to the local generator (50) for locking the reference signal to a component of the received data signal.

Growing community of inventors

Indialantic, FL, United States of America

Carl F Andren