International Business Machines Corporation

Carl A Morrell

Jeffery Michael Franke

Donald Eugene Johnson

David Robert Woodham

Gerhard Nikolaus Buckler

Malcolm Scott Ware

Dhruv Manmohandas Desai

Christopher Landon Wood

William Bradley Schwartz

Michael Joseph Steinmetz

Gary Roy Shippy

Michael Leo Scollard

Nickolas John Gruendler

Alfredo Aldereguia

Grace Ann Richter

Challis Llewellyn Purrington

Tu T Dang

Henry Gaines McMillan

Robert F Kantner, Jr

Mark W Williams

Aspects for monitoring audible tones indicative of operational status of each planar in a multiple planar chassis are described. Included in the aspects is the monitoring of a speaker channel of each planar of a plurality of planars in a common chassis for state changes of beep tones. An operational status of a specific planar emitting the beep tones is identified based on the state changes.

System for monitoring audible tones in a multiple planar chassis

Computer peripheral expansion apparatus, methods of operation, and computer program products including blade peripheral expansion units ('BPEUs'), each BPEU including a peripheral interconnect multiplexer coupled for peripheral interconnect data communications through an upstream peripheral interconnect bus ('PIB') segment to a host blade, the upstream PIB segment fanned out by the multiplexer into two or more peripheral downstream interconnect channels, the multiplexer connecting the upstream PIB segment to only one of the downstream channels at a time; and the two or more downstream peripheral interconnect channels, at least one of the downstream channels connected to at least one peripheral interconnect device (&#x2018;PID&#x2019;) in the BPEU, the peripheral interconnect device being a device that communicates with the host blade according to a peripheral interconnect data communications protocol, one of the downstream channels configured to connect to an upstream PIB segment in another BPEU.

Computer peripheral expansion apparatus

A method and system for recovering a server blade, in a multiple server blade computer, that is lost during a flash update operation on a service processor in the server blade. Because of the flash update failure, the lost server blade is unaware of its location on a management pathway, which in an exemplary form may be a midplane or a bus, which connects the server blade and a management module in a server blade chassis. The lost server blade puts a signal on the management pathway indicating that the flash failed. The signal is put on a special channel reserved for such messages. The management module receives the signal, and then determines which of the multiple server blades are lost due to the flash update failure.

Method and system to recover a failed flash of a blade service processor in a server chassis

A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a system is disclosed for monitoring a voltage supplied by a voltage regulation module to a processor in response to a dynamic VID generated by the processor. The voltage monitoring system monitors the voltage generated by the voltage regulation module to ensure the supplied voltage is within regulation thresholds. The voltage monitoring system acquires an analog reading of the supplied voltage and converts it to a digital value. If the VID changes during the conversion, the result of the A/D conversion is discarded. If the VID does not change, the voltage monitoring system accepts the result of the A/D conversion and compares the supplied voltage to the voltage expected in response to the VID. The voltage monitoring system may also compute the error between the actual and expected voltage for each accepted A/D conversion.

Structure for analyzing dynamic CPU voltage

Methods, systems, and products are disclosed for enabling memory module slots in a computing system after a repair action, the computing system having a plurality of memory module slots and having at least one memory module installed in one of the memory module slots, that includes: determining, during a boot process for the computing system, whether any of the memory module slots are disabled; and if any of the memory module slots are disabled: retrieving, for each memory module installed in one of the memory module slots, a memory module identifier for that memory module, retrieving, from non-volatile memory of the computing system, previously stored memory module identifiers, determining whether the retrieved memory module identifiers match the previously stored memory module identifiers, and enabling the disabled memory module slots if the retrieved memory module identifiers do not match the previously stored memory module identifiers.

Enabling memory module slots in a computing system after a repair action

A system for recovering a server blade, in a multiple server blade computer, that is lost during a flash update operation on a service processor in the server blade. Because of the flash update failure, the lost server blade is unaware of its location on a management pathway, which in an exemplary form may be a midplane or a bus, which connects the server blade and a management module in a server blade chassis. The lost server blade puts a signal on the management pathway indicating that the flash failed. The signal is put on a special channel reserved for such messages. The management module receives the signal, and then determines which of the multiple server blades are lost due to the flash update failure.

System to recover a failed flash of a blade service processor in a server chassis

A computer program product is presented for recovering a server blade, in a multiple server blade computer, that is lost during a flash update operation on a service processor in the server blade. Because of the flash update failure, the lost server blade is unaware of its location on a management pathway, which in an exemplary form may be a midplane or a bus, which connects the server blade and a management module in a server blade chassis. The lost server blade puts a signal on the management pathway indicating that the flash failed. The signal is put on a special channel reserved for such messages. The management module receives the signal, and then determines which of the multiple server blades are lost due to the flash update failure.

Computer program product for recovery of a failed flash of a blade service processor in a server chassis

A method and system and calibration technique for power measurement and management over multiple time frames provides responsive power control while meeting global system power consumption and power dissipation limits. Power output of one or more system power supplies is measured and processed to produce power values over multiple differing time frames. The measurements from the differing time frames are used to determine whether or not system power consumption should be adjusted and then one or more devices is power-managed in response to the determination. The determination may compare a set of maximum and/or minimum thresholds to each of the measurements from the differing time frames. A calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor calibration is made at the common mode voltage of the power supply output.

Method, system and calibration technique for power measurement and management over multiple time frames

Systems and methods are disclosed for monitoring a voltage supplied by a voltage regulation module to a processor in response to a dynamic VID generated by the processor. In one embodiment, a voltage monitoring system monitors the voltage generated by the voltage regulation module to ensure the supplied voltage is within regulation thresholds. The voltage monitoring system acquires an analog reading of the supplied voltage and converts it to a digital value. If the VID changes during the conversion, the result of the A/D conversion is discarded. If the VID does not change, the voltage monitoring system accepts the result of the A/D conversion and compares the supplied voltage to the voltage expected in response to the VID. The voltage monitoring system may compute the error between the actual and expected voltage for each accepted A/D conversion. These errors may be accumulated and averaged. The accumulated error may be compared with regulation thresholds, such as a predefined allowable margin of error. If the accumulated error exceeds regulation thresholds, an alert may be generated and action may be taken depending on the degree and severity of the accumulated error.

System and method for analyzing dynamic CPU voltage

A calibration technique provides for precision calibration of system power measurement. The calibration technique uses a precision reference resistor and voltage reference controlled current source to introduce a voltage drop from the input side of a power supply sense resistor. Calibration measurements are thereby made for voltages substantially equal to the voltage of the power supply output, so that differential measurements are made at substantially the same common-mode voltage by appropriate selection of the relationship of the resistance of the precision reference resistor and the resistance of the sense resistor, where the common-mode voltage of the measurement is substantially equal to the power supply output voltage.

Growing community of inventors

Cary, NC, United States of America

Carl A Morrell