Texas Instruments Corporation

Cameron Gross

Reima Tapani Laaksonen

Eric A Joseph

Gautam V Thakar

Mercer Brugler

Steven P Zuhoski

Edward L Mickler

A lithographic method of forming submicron polysilicon features on a semiconductor substrate, including the steps of coating said substrate with an anti-reflective coating (ARC) comprising two layers having matched indices of refraction (n) and extinction coefficient (k) selected to reduce reflection to less than 1% with 193 nm wavelength exposure. The ARC is subsequently patterned to serve as an etch hardmask. Preferably the ARC mask consists of a first layer of between 300 and 1500 angstroms of silicon rich silicon nitride having an extinction coefficient of from 0.77 to 1.07, and a second layer of between 170 and 320 angstroms of silicon oxynitride having an extinction coefficient of about 0.32.

Polysilicon processing using an anti-reflective dual layer hardmask for 193 nm lithography

A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat ( ) is deposited to protect and encapsulate the top metal interconnect layer ( ). The protective overcoat ( ) is patterned and etched to form bondpad windows either before or after depositing the final metal interconnect layer ( ). A sinter that is normally performed after forming the bondpad windows is either omitted or the temperature of the sinter is kept at or below 350&deg; C.

Control of Vmin transient voltage drift by maintaining a temperature less than or equal to 350&deg; C. after the protective overcoat level

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Allen, TX, United States of America

Cameron Gross